Pseudorandom Techniques
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Köp båda 2 för 3330 krPaul H. Bardell and W. H. McAnney are the authors of Built In Test for VLSI: Pseudorandom Techniques, published by Wiley.
Digital Testing and the Need for Testable Design. Principles of Testable Design. Pseudorandom Sequence Generators. Test Response Compression Techniques. Shift-Register Polynomial Division. Special-Purpose Shift-Register Circuits. Random Pattern Built-In Test. Built-In Test Structures. Limitations and Other Concerns of Random Pattern Testing. Test System Requirements for Built-In Test. Appendix. References. Index.