Designing 2D and 3D Network-on-Chip Architectures (inbunden)
Format
Inbunden (Hardback)
Språk
Engelska
Antal sidor
265
Utgivningsdatum
2013-10-08
Upplaga
2014 ed.
Förlag
Springer-Verlag New York Inc.
Medarbetare
Siozios, Kostas / Jantsch, Axel
Illustrationer
79 Illustrations, color; 65 Illustrations, black and white; XIII, 265 p. 144 illus., 79 illus. in co
Dimensioner
234 x 155 x 20 mm
Vikt
522 g
Antal komponenter
1
Komponenter
1 Hardback
ISBN
9781461442738

Designing 2D and 3D Network-on-Chip Architectures

Inbunden,  Engelska, 2013-10-08
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This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies.
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Innehållsförteckning

Part I: Network-on-Chip Design Methodology.- Network-on-Chip Technology: A Paradigm Shift.- NoC Modeling and Topology Exploration.- Communication Architecture.- Power and Thermal Effects and Management.- NoC-based System Integration.- NoC Verification and Testing.- The Spidergon STNoC.- Middleware Memory Management in NoC.- On Designing 3-D Platforms.- The SYSMANTIC NoC Design and Prototyping Framework.- Part II: Suggested Projects.- Projects on Network-on Chip.