Performance and Analysis of Task Out-of-Order Execution in MPSoCs (häftad)
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Format
Häftad (Paperback / softback)
Språk
Engelska
Antal sidor
76
Utgivningsdatum
2016-01-15
Förlag
LAP Lambert Academic Publishing
Medarbetare
Kumar P Ganesh
Illustrationer
black & white illustrations
Dimensioner
229 x 152 x 5 mm
Vikt
123 g
Antal komponenter
1
Komponenter
Paperback
ISBN
9783659827594

Performance and Analysis of Task Out-of-Order Execution in MPSoCs

Research Perspective

av Prasath R Arun, Kumar P Ganesh
Häftad,  Engelska, 2016-01-15
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The inter-subsystem communication structure can be optimized at the beginning of the design process by using simulation models at three different abstraction levels. Some design loop cases can be avoided by using this exploration method. With the Motion-JPEG case study, and illustrate the whole communication exploration process step by step. From experimental results, it show that compared with the cycle accurate simulation, the inter subsystem communication can be well optimized and evaluated at higher abstraction levels. In this project, a solution for a classification problem that is used for optimized packet assignment to different data paths within a network processor System-on-Chip (SoC). Based on a specification of the usage case for our classifier it derive Heterogeneous Decision Graph Algorithm (HDGA), a heuristic approach to construct a decision tree classifier that integrates external lookup results for certain types of rules. Evaluated various parameters for optimizing the proposed decision tree and present simulation results to show the scalability of HDGA for typical problem sizes. This project is concluded with the results of an implementation on our FPGA Platform.
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