Adam C. Krolnik – författare

Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user’s existing verification environment, in other words the testbench infrastructure.The guiding principles promoted in this book when creating an assertion-based IP monitor are: modularity—assertion-based IP should have a clear separation between detection and actionclarity—assertion-based IP should be written initially focusing on capturing intent (versus optimizations) A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors’ experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers.From the Foreword:Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come."Andrew Piziali, Sr. Design Verification EngineerCo-Author, ESL Design and Verification: A Prescription for Electronic System Level MethodologyAuthor, Functional Verification Coverage Measurement and Analysis

The focus of Assertion-Based Design is three-fold: How to specify assertions; how to create and adopt a methodology that supports assertion-based design (predominately for RTL design); and what to do with the assertions and methodology once you have them. To support these three over-arching goals, the authors showcase multiple forms of assertion specification: Accellera Open Verification Library (OVL), Accellera Property Specification Language (PSL), and Accellera SystemVerilog. The recommendations and claims the authors make in this book are based on their combined actual experiences in applying an assertion-based methodology to real design and verification as well as their work in developing industry assertion standards.

The focus of Assertion-Based Design, Second Edition is three-fold: To support these three over-arching goals, we showcase multiple forms of assertion specifications: Accellera Open Verification Library (OVL), Accellera Property Specification Language (PSL), and Accellera System Verilog. The recommendations and claims we make in this book are based on our combined actual experiences in applying an assertion-based methodology to real design and verification as well as our work in developing industry assertion standards. Differences between the first edition and the second edition include:

Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user’s existing verification environment, in other words the testbench infrastructure.The guiding principles promoted in this book when creating an assertion-based IP monitor are: modularity—assertion-based IP should have a clear separation between detection and actionclarity—assertion-based IP should be written initially focusing on capturing intent (versus optimizations) A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors’ experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers.From the Foreword:Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come."Andrew Piziali, Sr. Design Verification EngineerCo-Author, ESL Design and Verification: A Prescription for Electronic System Level MethodologyAuthor, Functional Verification Coverage Measurement and Analysis

The focus of Assertion-Based Design, Second Edition is three-fold: -How to specify assertions, -How to create and adopt a methodology that supports assertion-based design (predominately for RTL design), -What to do with the assertions and methodology once you have them. To support these three over-arching goals, we showcase multiple forms of assertion specifications: Accellera Open Verification Library (OVL), Accellera Property Specification Language (PSL), and Accellera System Verilog. The recommendations and claims we make in this book are based on our combined actual experiences in applying an assertion-based methodology to real design and verification as well as our work in developing industry assertion standards. Differences between the first edition and the second edition include: -Updates to the manuscript based on newer versions of standards, -Corrections to errata identified during reviewer feedback, -New material that presents techniques on how to avoid common ambiguity errors, -New material that discusses high-level requirements modeling for specification.