Jean Mermet – författare

Ultimately, every theoretical "mathematical machine" needs translation into a physical form, and this is what hardware is all about. The invention of hardware description languages (HDLs) in the early 1960s was an attempt to remain at an abstract level in the design process, pushing the stage of physical implementation to the point at which no more technology-independent decisions need to be made. It was also an answer to the continuous, exponential growth in the complexity of the systems to be designed. This complexity has meant that systems have become unmanageable in human terms, requiring CAD support. Furthermore, HDL descriptions remain "implementation free", although increasingly precise and complete, meaning that the same system can undergo successive implementations over several technological generations. The first part of this work takes a look back over several decades, describing the mathematics, high level language concepts and system level methodology. This should help the reader to assimilate the theoretical background to the advanced application domains of HDLs, which are dealt with in the second part of the book.The third part provides a sampling of recent, fully implemented HDLs, demonstrating how new concepts can become a reality, how long it takes, and how long it will take to complete HDL up to the present level of knowledge.

This text deals with the concurrent design of electronic applications, including both hardware and software. The issue has become the bottleneck in the design of electronic systems, including both hardware and software, in several major industrial fields, including telecommunications, automotive and aerospace engineering. The major difficulty with the subject is that it demands contributions from several research fields, including system specification, system architecture, hardware design, and software design. The present volume presents a comprehensive discussion of all the aspects of system-level synthesis. Each topic is covered by a contribution written by an international authority on the subject.

This text deals with the concurrent design of electronic applications, including both hardware and software. The issue has become the bottleneck in the design of electronic systems, including both hardware and software, in several major industrial fields, including telecommunications, automotive and aerospace engineering. The major difficulty with the subject is that it demands contributions from several research fields, including system specification, system architecture, hardware design, and software design. The present volume presents a comprehensive discussion of all the aspects of system-level synthesis. Each topic is covered by a contribution written by an international authority on the subject.

System Design Automation outlines and describes the latest advances in design languages. The challenge of System on a Chip (SOC) design requires designers to work in a multi-lingual environment which is becoming increasingly difficult to master. It is therefore crucial for them to learn, almost in real time, from the experiences of their colleagues in the use of design languages and how these languages have become more advanced to cope with system design. System designers, as well as students willing to become system designers, often do not have the time to attend all scientific events where they could learn the necessary information. This book presents a selected digest of respected contributions and industry strength case studies. All the levels of abstraction that are relevant, from the informal user requirements down to the implementation specifications, are addressed by different contributors. The authors present examples of actual industrial world applications. Furthermore, the academic concepts presented in this book provide theories to student readers and the concepts described are up to date, and in so doing provide suitable root information for Ph.D. postgraduates.

This text brings together a selection of the best papers from three international electronic design language conferences in 2000. The conferences are the Hardware Description Language Conference and Exhibition (HDLCon), held in the Silicon Valley area of USA; the Forum on Design Languages (FDL), held in Europe; and the Asia Pacific Chip Design Language (APChDL) Conference. The papers cover a range of topics, including design methods, specification and modelling languages, tool issues, formal verification, simulation and synthesis. The results presented in these papers should help researchers and practising engineers keep abreast of developments in this rapidly evolving field.

This text deals with the different aspects of low power design for deep submicron electronics at all levels of abstraction from system level to circuit level and technology. Its objective is to guide industrial and academic engineers and researchers in the selection of methods, technologies and tools and to provide a baseline for further developments. Furthermore the book has been written to serve as a textbook for postgraduate student courses. In order to achieve both goals, it is structured into different chapters each of which addresses a different phase of the design, a particular level of abstraction, a unique design style or technology. These design-related chapters are amended by motivations in Chapter 2, which presents visions both of future low power applications and technology advancements, and by some advanced case studies in Chapter 9.

The emergence of VHDL, as a standard for hardware description languages helped disseminate the use of such languages among IC designers. The creation of the standard however does not mean that all work has ceased. Research continues in the use of the language and on improvements of the standard. This book presents recent research on four key issues related to the use of VHDL. The first part covers simulation of circuits using VHDL in which timing and switching are central themes. Part 2 looks at the combination of synthesis and VHDL in designing circuits. This includes a case study of chip design using silicon 1076. Advances in the formal verification of VHDL designs are given in Part 3. This relatively new area in the use of VHDL is developing rapidly into an important issue for speeding the design of circuits. The final part considers modelling issues and system level design. The contributions to this volume are based on specially selected papers from EURO-VHDL conferences in 1990 and 1991. These papers have been updated and expanded to give the reader a current state of the art in the use of VHDL in circuit design.

This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to supportIP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of.

The Forum on Design Languages (FDL) is the European forum to exchange experiences and learn new trends, in the application of languages and the associated design methods and tools, to design complex electronic systems. By offering several co-located workshops, this multi-faceted event gives an opportunity to gain up-to-date knowledge across main aspects of such a wide field. All the workshops address as their common denominator the different application domains of system-design languages with the presentation of the up-to-date research results and design experiences. FDL'02 was organized as four focused workshops: "Languages for Analogue and Mixed-Signal System Design"; "UML-Based System Specification and Design"; "C/C++-Based System Design"; and "Specification Formalisms for Proven Design". FDL served once more as the European forum for electronic system design languages and consolidates as a place where designers interested in design languages and their applications can meet and interchange experiences. In this book, a selection of papers presented in FDL'02 is published. The text contains research contributions in the four areas mentioned above.

This text addresses system design by providing a framework for assessing and developing system design practices that observe and utilise reuse of system design know-how. The know-how accumulated in the companies represents an intellectual asset, or property ("IP"). The contemporary situation regarding system design in general is, that the methods are insufficient, informally practised, and weakly supported by formal techniques and tools. Regarding system design reuse the methods and tools for exchanging system design data and know-how within companies are ad hoc and insufficient. The means available inside companies being already insufficient, there are actually no ways of exchanging between companies. To establish means for systematic reuse, the required system design concepts are identified through an analysis of existing design flows, and their definitions are catalogued in the form of a glossary and taxonomy. The System Design Conceptual Model (SDCM) formalises the concepts and their relationships by providing meta-models for both the system design process (SDPM) and the system under design (SUDM).The models are generic enough so that they can be applied in various organisations and for various kinds of electronic systems. System design patterns are presented as example means for enhancing reuse. The characteristics of system-level IP, a list of heuristic criteria of system-IP reusability, and guidelines for assessing system IP reusability within a particular design flow provide a pragmatic view to reuse. An analysis of selected languages and formalisms, and guidelines for the analysis of system-level languages provides means for assessing how the expression and representation of system design concepts are supported by languages. The book describes both a theoretical framework and various practical means for improving reuse in the design of complex systems.

Electronic Chips & Systems Design Languagesoutlines and describes the latest advances in design languages. The challenge of System on a Chip (SOC) design requires designers to work in a multi-lingual environment which is becoming increasingly difficult to master. It is therefore crucial for them to learn, almost in real time, from the experiences of their colleagues in the use of design languages and how these languages have become more advanced to cope with system design. System designers, as well as students willing to become system designers, often do not have the time to attend all scientific events where they could learn the necessary information. This book will bring them a selected digest of the best contributions and industry strength case studies. All the levels of abstraction that are relevant, from the informal user requirements down to the implementation specifications, are addressed by different contributors. The author, together with colleague authors who provide valuable additional experience, presents examples of actual industrial world applications.Furthermore the academic concepts presented in this book provide excellent theories to student readers and the concepts described are up to date and in so doing provide most suitable root information for Ph.D. postgraduates.

System-on-Chip Methodologies & Design Languages brings together a selection of the best papers from three international electronic design language conferences in 2000. The conferences are the Hardware Description Language Conference and Exhibition (HDLCon), held in the Silicon Valley area of USA; the Forum on Design Languages (FDL), held in Europe; and the Asia Pacific Chip Design Language (APChDL) Conference. The papers cover a range of topics, including design methods, specification and modeling languages, tool issues, formal verification, simulation and synthesis. The results presented in these papers will help researchers and practicing engineers keep abreast of developments in this rapidly evolving field.

UML-B Specification for Proven Embedded Systems Design presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUSSEE) as conceived in the course of the research during 2002 - 2003. The goal of the research in this project was to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This is done by combining the formal and informal means of specification by way of the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (with some particular attention to interfaces, in line with the VSIA/SLIF approach). The link of B with C, VHDL and SystemC extends the correct-by-construction design process to lower system-on-chip (SoC) development stages. The production of proven embedded software is therefore complemented by the production of proven hardware.Prototype tools have been developed for the code generation from UML and B, and existing B verification tools will be extended to support IP reuse, according to the VSIA recommendations. The methodology and tools were validated through the development of three industrial applications: a wireless mobile terminal a telecom system-on-chip based on HIPERLAN/2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters of UML-B Specification for Proven Embedded Systems Design, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience including the various sectors of industry's system design engineers, university teachers and researchers. They will hopefully convince skeptical professionals that formal approaches can now cope with industrial strength problems.

In this fourth book in the CHDL Series, a selection of the best papers presented in FDL'02 is published. System Specification and Design Languages contains outstanding research contributions in the four areas mentioned above. So, The Analog and Mixed-Signal system design contributions cover the new methodological approaches like AMS behavioral specification, mixed-signal modeling and simulation, AMS reuse and MEMs design using the new modeling languages such as VHDL-AMS, Verilog-AMS, Modelica and analog-mixed signal extensions to SystemC.UML is the de-facto standard for SW development covering the early development stages of requirement analysis and system specification. The UML-based system specification and design contributions address latest results on hot-topic areas such as system profiling, performance analysis and UML application to complex, HW/SW embedded systems and SoC design.C/C++-for HW/SW systems design is entering standard industrial design flows. Selected papers cover system modeling, system verification and SW generation.The papers from the Specification Formalisms for Proven design workshop present formal methods for system modeling and design, semantic integrity and formal languages such as ALPHA, HANDLE and B.

This book presents the perspective of the SYDIC-Telecom project on system design and reuse as perceived in the course of the research during 1999 - 2003. The initial problem statement of the research was formulated as follows: "The current situation regarding system design in general is, that the methods are insufficient, informally practiced, and weakly supported by formal techniques and tools. Regarding system reuse the methods and tools for exchanging system design data and know-how within companies are ad hoc and insufficient. The means available inside companies being already insufficient, there are actually no ways of exchanging between companies. Therefore, there hardly exists any system IP (Intellectual Property) industry. Although system design know-how is one of companies' main assets, it cannot be reused and capitalised effectively enough today. There is a lack of rational design flows supporting a design methodology based on reuse of IP, and few design tools to support it. Even guidelines on how to use existing tools in the design flow for this purpose often do not exist." The problem was known to be hard and the scope broad. The plan of attack was first to analyse the state-of-the-art and the state-of-the-practice, then to identify potential improvements, and finally to synthesise a formalised proposal for implementation. The approach was applied to different system-level issues, e.g. design flows, terminology, languages, reuse, design process and object of design.

The success of VHDL since it has been balloted in 1987 as an IEEE standard may look incomprehensible to the large population of hardware designers, who had never heared of Hardware Description Languages before (for at least 90% of them), as well as to the few hundreds of specialists who had been working on these languages for a long time (25 years for some of them). Until 1988, only a very small subset of designers, in a few large companies, were used to describe their designs using a proprietary HDL, or sometimes a HDL inherited from a University when some software environment happened to be developped around it, allowing usability by third parties. A number of benefits were definitely recognized to this practice, such as functional verification of a specification through simulation, first performance evaluation of a tentative design, and sometimes automatic microprogram generation or even automatic high level synthesis. As there was apparently no market for HDL's, the ECAD vendors did not care about them, start-up companies were seldom able to survive in this area, and large users of proprietary tools were spending more and more people and money just to maintain their internal system.