Yervant Zorian – författare

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12 produkter

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12 produkter

Principles of Testing Electronic Systems
AvSamiha Mourad,Yervant Zorian
Inbunden, Engelska, 2000
1 922 kr
Skickas inom 5-8 vardagar
A pragmatic approach to testing electronic systems As we move ahead in the electronic age, rapid changes in technology pose an ever-increasing number of challenges in testing electronic products. Many practicing engineers are involved in this arena, but few have a chance to study the field in a systematic way-learning takes place on the job. By covering the fundamental disciplines in detail, Principles of Testing Electronic Systems provides design engineers with the much-needed knowledge base. Divided into five major parts, this highly useful reference relates design and tests to the development of reliable electronic products; shows the main vehicles for design verification; examines designs that facilitate testing; and investigates how testing is applied to random logic, memories, FPGAs, and microprocessors. Finally, the last part offers coverage of advanced test solutions for today's very deep submicron designs. The authors take a phenomenological approach to the subject matter while providing readers with plenty of opportunities to explore the foundation in detail. Special features include:* An explanation of where a test belongs in the design flow* Detailed discussion of scan-path and ordering of scan-chains* BIST solutions for embedded logic and memory blocks* Test methodologies for FPGAs* A chapter on testing system on a chip* Numerous references
Del 11 - Frontiers in Electronic Testing
On-Line Testing for VLSI
AvMichael Nicolaidis,Yervant Zorianm. fl.
Inbunden, Engelska, 1998
1 086 kr
Skickas inom 10-15 vardagar
Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
Multi-Chip Module Test Strategies
AvYervant Zorian
Inbunden, Engelska, 1997
1 086 kr
Skickas inom 10-15 vardagar
Multi-chips modules (MCMs) in the late 1990s consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. This volume of research presents updated test strategies for MCMs. It is designed for engineers interested in practical implementations of MCM test solutions and for designers seeking current test and design-for-testability solutions for their next designs.
Del 28 - Frontiers in Electronic Testing
Embedded Processor-Based Self-Test
AvDimitris Gizopoulos,A. Paschalism. fl.
Inbunden, Engelska, 2004
1 674 kr
Skickas inom 10-15 vardagar
Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-Chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based self-testing techniques, which usually have a non-trivial impact on a circuit’s performance, size and power, can not be applied without serious consideration and careful incorporation into the processor design.Embedded Processor-Based Self-Test shows how the powerful embedded functionality that processors offer can be utilized as a self-testing resource. Through a discussion of different strategies the book emphasizes on the emerging area of Software-Based Self-Testing (SBST). SBST is based on the idea of execution of embedded software programs to perform self-testing of the processor itself and its surrounding blocks in the SoC. SBST is a low-cost strategy in terms of overhead (area, speed, power), development effort and test application cost, as it is applied using low-cost, low-speed test equipment.Embedded Processor-Based Self-Test can be used by designers, DfT engineers, test practitioners, researchers and students working on digital testing, and in particular processor and SoC test. This book sets the framework for comparisons among different SBST methodologies by discussing key requirements. It presents successful applications of SBST to a number of embedded processors of different complexities and instruction set architectures.
Embedded Processor-Based Self-Test
AvYervant Zorian,A. Paschalism. fl.
E-bok
PDF, Engelska, 2013
2 044 kr
Läs direkt efter köp
Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-Chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based self-testing techniques, which usually have a non-trivial impact on a circuit’s performance, size and power, can not be applied without serious consideration and careful incorporation into the processor design.
Embedded Processor-Based Self-Test shows how the powerful embedded functionality that processors offer can be utilized as a self-testing resource. Through a discussion of different strategies the book emphasizes on the emerging area of Software-Based Self-Testing (SBST). SBST is based on the idea of execution of embedded software programs to perform self-testing of the processor itself and its surrounding blocks in the SoC. SBST is a low-cost strategy in terms of overhead (area, speed, power), development effort and test application cost, as it is applied using low-cost, low-speed test equipment.
Embedded Processor-Based Self-Test can be used by designers, DfT engineers, test practitioners, researchers and students working on digital testing, and in particular processor and SoC test. This book sets the framework for comparisons among different SBST methodologies by discussing key requirements. It presents successful applications of SBST to a number of embedded processors of different complexities and instruction set architectures.
Del 11 - Frontiers in Electronic Testing
On-Line Testing for VLSI
AvMichael Nicolaidis,Yervant Zorianm. fl.
Häftad, Engelska, 2010
1 086 kr
Skickas inom 10-15 vardagar
Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
Embedded Processor-Based Self-Test
AvDimitris Gizopoulos,A. Paschalism. fl.
Häftad, Engelska, 2011
1 626 kr
Skickas inom 10-15 vardagar
Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-Chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based self-testing techniques, which usually have a non-trivial impact on a circuit’s performance, size and power, can not be applied without serious consideration and careful incorporation into the processor design.Embedded Processor-Based Self-Test shows how the powerful embedded functionality that processors offer can be utilized as a self-testing resource. Through a discussion of different strategies the book emphasizes on the emerging area of Software-Based Self-Testing (SBST). SBST is based on the idea of execution of embedded software programs to perform self-testing of the processor itself and its surrounding blocks in the SoC. SBST is a low-cost strategy in terms of overhead (area, speed, power), development effort and test application cost, as it is applied using low-cost, low-speed test equipment.Embedded Processor-Based Self-Test can be used by designers, DfT engineers, test practitioners, researchers and students working on digital testing, and in particular processor and SoC test. This book sets the framework for comparisons among different SBST methodologies by discussing key requirements. It presents successful applications of SBST to a number of embedded processors of different complexities and instruction set architectures.
Multi-Chip Module Test Strategies
AvYervant Zorian
Häftad, Engelska, 2012
1 086 kr
Skickas inom 10-15 vardagar
MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain. Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2).
Multi-Chip Module Test Strategies
AvYervant Zorian
E-bok
PDF, Engelska, 2012
1 416 kr
Läs direkt efter köp
MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain. Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2).
On-Line Testing for VLSI
AvDhiraj Pradhan,Yervant Zorianm. fl.
E-bok
PDF, Engelska, 2013
1 413 kr
Läs direkt efter köp
Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
Del 9334 - Lecture Notes in Computer Science
Collaboration and Technology
21st International Conference, CRIWG 2015, Yerevan, Armenia, September 22-25, 2015, Proceedings
AvNelson Baloian,Yervant Zorianm. fl.
Häftad, Engelska, 2015
510 kr
Skickas inom 10-15 vardagar
This book constitutes the refereed proceedings of the 21st International Conference on Collaboration and Technology, CRIWG 2015, held in Yerevan, Armenia, in September 2015.The 19 revised papers presented together with 1 invited talk were carefully reviewed and selected from 28 submissions. CRIWG has been focused on collaboration technology design, development, and evaluation. The background research is influenced by a number of disciplines, such as computer science, management science, informationsystems, engineering, psychology, cognitive sciences, and social sciences.
Collaboration and Technology
21st International Conference, CRIWG 2015, Yerevan, Armenia, September 22-25, 2015, Proceedings
AvSamvel Shoukouryan,Perouz Taslakianm. fl.
E-bok
PDF, Engelska, 2015
614 kr
Läs direkt efter köp
This book constitutes the refereed proceedings of the 21st International Conference on Collaboration and Technology, CRIWG 2015, held in Yerevan, Armenia, in September 2015.
The 19 revised papers presented together with 1 invited talk were carefully reviewed and selected from 28 submissions. CRIWG has been focused on collaboration technology design, development, and evaluation. The background research is influenced by a number of disciplines, such as computer science, management science, informationsystems, engineering, psychology, cognitive sciences, and social sciences.

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Yervant Zorian – författare

Principles of Testing Electronic Systems

On-Line Testing for VLSI

Multi-Chip Module Test Strategies

Embedded Processor-Based Self-Test

Embedded Processor-Based Self-Test

On-Line Testing for VLSI

Embedded Processor-Based Self-Test

Multi-Chip Module Test Strategies

Multi-Chip Module Test Strategies

On-Line Testing for VLSI

Collaboration and Technology

Collaboration and Technology

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