Advanced Interconnects for ULSI Technology

Inbunden, Engelska, 2012

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Beskrivning

Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance. Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses: Interconnect functions, characterisations, electrical properties and wiring requirementsLow-k materials: fundamentals, advances and mechanical propertiesConductive layers and barriersIntegration and reliability including mechanical reliability, electromigration and electrical breakdownNew approaches including 3D, optical, wireless interchip, and carbon-based interconnectsIntended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.

Produktinformation

Utgivningsdatum:2012-03-02
Mått:178 x 254 x 33 mm
Vikt:1 052 g
Format:Inbunden
Språk:Engelska
Antal sidor:608
Förlag:John Wiley & Sons Inc
ISBN:9780470662540

Utforska kategorier

Elektronik och kommunikationer inom Naturvetenskap och teknik

Mer om författaren

Mikhail R. BaklanovIMEC, Leuven, BelgiumPaul S. HoLaboratory for Interconnect and Packaging, University of Texas at Austin, Austin, Texas, USAEhrenfried ZschechFraunhofer Institute for Nondestructive Testing, Dresden, Germany

Innehållsförteckning

About the Editors xv List of Contributors xviiPreface xxiList of Abbreviations xxvSection I Low-k Materials 11 Low-k Materials: Recent Advances 3Geraud Dubois and Willi Volksen1.1 Introduction 31.2 Integration Challenges 51.2.1 Process-Induced Damage 61.2.2 Mechanical Properties 91.3 Processing Approaches to Existing Integration Issues 101.3.1 Post-deposition Treatments 111.3.2 Prevention or Repair of Plasma-Induced Processing Damage 141.3.3 Multilayer Structures 151.4 Material Advances to Overcome Current Limitations 161.4.1 Silica Zeolites 161.4.2 Hybrid Organic–Inorganic: Oxycarbosilanes 191.5 Conclusion 222 Ultra-Low-k by CVD: Deposition and Curing 35Vincent Jousseaume, Aziz Zenasni, Olivier Gourhant, Laurent Favennec and Mikhail R. Baklanov2.1 Introduction 352.2 Porogen Approach by PECVD 372.2.1 Precursors and Deposition Conditions 372.2.2 Mystery Still Unsolved: From Porogens to Pores 412.3 UV Curing 422.3.1 General Overview of Curing 422.3.2 UV Curing Mechanisms 432.4 Impact of Curing on Structure and Physical Properties: Benefits of UV Curing 492.4.1 Porosity 492.4.2 Chemical Structure and Mechanical Properties 502.4.3 Electrical Properties 562.5 Limit/Issues with the Porogen Approach 572.5.1 Porosity Creation Limit 582.5.2 Porogen Residues 592.6 Future of CVD Low-k 622.6.1 New Matrix Precursor 622.6.2 Other Deposition Strategies 642.6.3 New Deposition Techniques 662.7 Material Engineering: Adaptation to Integration Schemes 682.8 Conclusion 703 Plasma Processing of Low-k Dielectrics 79Hualing Shi, Denis Shamiryan, Jean-Francois de Marneffe, Huai Huang, Paul S. Ho and Mikhail R. Baklanov3.1 Introduction 793.2 Materials and Equipment 803.3 Process Results Characterization 823.4 Interaction of Low-k Dielectrics with Plasma 853.4.1 Low-k Etch Chemistries 853.4.2 Patterning Strategies and Masking Materials 873.4.3 Etch Mechanisms 883.5 Mechanisms of Plasma Damage 923.5.1 Gap Structure Studies 933.5.2 Effect of Radical Density 953.5.3 Effect of Ion Energy 963.5.4 Effect of Photon Energy and Intensity 993.5.5 Plasma Damage by Oxidative Radicals 1033.5.6 Hydrogen-Based Plasma 1053.5.7 Minimization of Plasma Damage 1083.6 Dielectric Recovery 1123.6.1 CH4 Beam Treatment 1123.6.2 Dielectric Recovery by Silylation 1133.6.3 UV Radiation 1193.7 Conclusions 1214 Wet Clean Applications in Porous Low-k Patterning Processes 129Quoc Toan Le, Guy Vereecke, Herbert Struyf, Els Kesters and Mikhail R. Baklanov4.1 Introduction 1294.2 Silica and Porous Hybrid Dielectric Materials 1304.3 Impact of Plasma and Subsequent Wet Clean Processes on the Stability of Porous Low-k Dielectrics 1344.3.1 Stability in Pure Chemical Solutions 1344.3.2 Stability in Commercial Chemistries 1354.3.3 Hydrophobicity of Hybrid Low-k Materials 1384.4 Removal of Post-Etch Residues and Copper Surface Cleaning 1414.5 Plasma Modification and Removal of Post-Etch 193 nm Photoresist 1464.5.1 Modification of 193 nm Photoresist by Plasma Etch 1464.5.2 Wet Removal of 193 nm Photoresist 153Section II Conductive Layers and Barriers 1735 Copper Electroplating for On-Chip Metallization 175Valery M. Dubin5.1 Introduction 1755.2 Copper Electroplating Techniques 1765.3 Copper Electroplating Superfill 1775.3.1 The Role of Accelerator 1775.3.2 The Role of Suppressor 1785.3.3 The Role of Leveler 1805.4 Alternative Cu Plating Methods 1825.4.1 Electroless Plating 1825.4.2 Direct Plating 1825.5 Electroplated Cu Properties 1845.5.1 Resistivity 1845.5.2 Impurities 1845.5.3 Electromigration 1855.6 Conclusions 1866 Diffusion Barriers 193Michael Hecker and René Hübner6.1 Introduction 1936.1.1 Cu Metallization, Barrier Requirements and Materials 1936.1.2 Barrier Deposition Techniques 1956.1.3 Characterization of Barrier Performance 1966.2 Metal-Based Barriers as Liners for Cu Seed Deposition 1986.2.1 Ta-Based Barriers 1986.2.2 W-Based Barriers 2096.2.3 Ti-Based Barriers 2106.2.4 Further Systems 2116.3 Advanced Barrier Approaches 2126.3.1 Barriers for Direct Cu Plating 2126.3.2 Metal Capping Layers 2146.3.3 Self-Forming Diffusion Barriers 2166.3.4 Self-Assembled Molecular Nanolayers and Polymer-Based Barriers 2186.4 Conclusions 221Section III Integration and Reliability 2357 Integration and Electrical Properties 237Sridhar Balakrishnan, Ruth Brain and Larry Zhao7.1 Introduction 2377.2 On-Die Interconnects in the Submicrometer Era 2377.3 On-Die Interconnects at Sub-100 nm Nodes 2407.4 Integration of Low-k Dielectrics in Sub-65 nm Nodes 2417.4.1 Degradation of Dielectric Constant during Integration 2437.4.2 Integration Issues in ELK Dielectrics Due to Degraded Mechanical Properties 2467.5 Patterning Integration at Sub-65 nm Nodes 2487.5.1 Patterning Challenges 2497.6 Integration of Conductors in Sub-65 nm Nodes 2527.6.1 Narrow Line Copper Resistivity 2537.6.2 Integrating Novel Barrier/Liner Materials and Deposition Techniques for Cu Interconnects 2547.6.3 Self-Forming Barriers and Their Integration 2567.6.4 Integration to Enable Reliable Copper Interconnects 2577.7 Novel Air-Gap Interconnects 2587.7.1 Unlanded Via Integration with Air-Gap Interconnects 2587.7.2 Air-Gap Formation Using Nonconformal Dielectric Deposition 2597.7.3 Air-Gap Formation Using a Sacrificial Material 2608 Chemical Mechanical Planarization for Cu–Low-k Integration 267Gautam Banerjee8.1 Introduction 2678.2 Back to Basics 2688.3 Mechanism of the CMP Process 2688.4 CMP Consumables 2718.4.1 Slurry 2718.4.2 Pad 2738.4.3 Pad Conditioner 2748.5 CMP Interactions 2768.6 Post-CMP Cleaning 2818.6.1 Other Defects 2868.6.2 Surface Finish 2868.6.3 E-Test 2878.7 Future Direction 287References 2889 Scaling and Microstructure Effects on Electromigration Reliability for Cu Interconnects 291Chao-Kun Hu, René Hübner, Lijuan Zhang, Meike Hauschildt and Paul S. Ho9.1 Introduction 2919.2 Electromigration Fundamentals 2939.2.1 EM Mass Flow 2939.2.2 EM Lifetime and Scaling Rule 2949.2.3 Statistical Test Method 2969.2.4 Effect of Current Density on EM Lifetime 2989.3 Cu Microstructure 3009.3.1 X-ray Diffraction (XRD) 3009.3.2 Electron Backscatter Diffraction in the Scanning Electron Microscope 3029.3.3 Orientation Imaging Microscopy in the Transmission Electron Microscope 3049.4 Lifetime Enhancement 3069.4.1 Effect of a Ta Liner 3069.4.2 Upper-Level Dummy Vias 3089.4.3 Plasma Pre-clean and SiH4 Soak 3109.4.4 CVD and ECD Cu and the Effect of Nonmetallic Impurities 3119.4.5 Cu Alloys 3149.4.6 CoWP Cap Near-Bamboo and Polycrystalline Cu Lines 3199.5 Effect of Grain Size on EM Lifetime and Statistics 3219.6 Massive-Scale Statistical Study of EM 3269.7 Summary 32910 Mechanical Reliability of Low-k Dielectrics 339Kris Vanstreels, Han Li and Joost J. Vlassak10.1 Introduction 33910.2 Mechanical Properties of Porous Low-k Materials 34010.2.1 Techniques to Measure Mechanical Properties of Thin Films 34010.2.2 Effect of Porosity on the Stiffness of Organosilicate Glass Films 34210.2.3 Hybrid Dielectrics Containing Organic/Inorganic Bridging Units 34410.2.4 Effect of UV Wavelength and Porogen Content on the Hardening Process of PECVD Low-k Dielectrics 34910.3 Fracture Properties of Porous Low-k Materials 35210.3.1 Adhesion Measurement Methods 35210.3.2 Fracture Toughness Measurement Techniques 35410.3.3 Effect of Porosity and Network Structure on the Fracture Toughness of Organosilicate Glass Films 35510.3.4 Effects of UV Cure on Fracture Properties of Carbon-Doped Oxides 35710.3.5 Water Diffusion and Fracture Properties of Organosilicate Glass Films 35910.4 Conclusion 36111 Electrical Breakdown in Advanced Interconnect Dielectrics 369Ennis T. Ogawa and Oliver Aubel11.1 Introduction 36911.1.1 Dual-Damascene Integration of Low-k Dielectrics 37011.1.2 Low-k Types and Integrating Low-k Dielectrics 37311.2 Reliability Testing 37811.2.1 Measurement of Dielectric Degradation 37811.2.2 Reliability Analysis 39011.3 Lifetime Extrapolation and Models 39711.4 Future Trends and Concerns 403Section IV New Approaches 43512 3D Interconnect Technology 437John U. Knickerbocker, Lay Wai Kong, Sven Niese, Alain Diebold and Ehrenfried Zschech12.1 Introduction 43712.2 Dimensional Interconnected Circuits (3DICs) for System Applications 438John U. Knickerbocker12.2.1 Introduction 43812.2.2 System Needs 44112.2.3 3D Interconnect Design and Architecture 44412.2.4 3D Fabrication and Interconnect Technology 44612.2.5 Trade-offs in Application Design and Product Applications 46412.2.6 Summary 46612.3 Advanced Microscopy Techniques for 3D Interconnect Characterization 467Lay Wai Kong, Sven Niese, Alain Diebold and Ehrenfried Zschech12.3.1 Scanning Acoustic Microscopy 46712.3.2 IR Microscopy 47312.3.3 Transmission X-ray Microscopy and Tomography 47412.3.4 Microstructure Analysis 48012.4 Summary 48613 Carbon Nanotubes for Interconnects 491Mizuhisa Nihei, Motonobu Sato, Akio Kawabata, Shintaro Sato and Yuji Awano13.1 Introduction 49113.2 Advantage of CNT Vias 49213.3 Fabrication Processes of CNT Vias 49313.4 Electrical Properties of CNT Vias 49613.5 Current Reliability of CNT Vias 49813.6 Conclusion 50114 Optical Interconnects 503Wim Bogaerts14.1 Introduction 50314.2 Optical Links 50514.2.1 Waveguides 50714.2.2 Waveguide Filters and (De)multiplexers 51014.2.3 Transmitter: Light Source 51314.2.4 Transmitter: Modulators 51414.2.5 Receiver: Photodetector 51714.2.6 Power Consumption and Heat Dissipation 51714.2.7 Different Materials 51814.2.8 Conclusion 51914.3 The Case for Silicon Photonics 51914.3.1 Waveguides and WDM Components 51914.3.2 Modulators, Tuners and Switches 52314.3.3 Photodetectors 52614.3.4 Light Sources 52614.3.5 Conclusion 52714.4 Optical Networks on a Chip 52814.4.1 WDM Point-to-Point Links 52914.4.2 Bus Architecture 52914.4.3 (Reconfigurable) Networks 53014.5 Integration Strategies 53214.5.1 Front-End-of-Line Integration 53314.5.2 Backside Integration 53514.5.3 Back-End-of-Line Integration 53514.5.4 3D Integration 53614.5.5 Flip-Chip Integration 53714.5.6 Conclusion 53714.6 Conclusion 53815 Wireless Interchip Interconnects 543Takamaro Kikkawa15.1 Introduction 54315.2 Wireless Interconnect Technologies 54715.2.1 Figure of Merit for Wireless Interconnects 54715.2.2 Capacitively Coupled Wireless Interconnects 54915.2.3 Inductively Coupled Wireless Interconnects 55015.2.4 Antennas and Propagation 55315.3 Conclusion 561References 561Index