FET Centennial

CARY Y. YANG, PHD, is a Professor of Electrical and Computer Engineering at Santa Clara University. An IEEE Life Fellow, he has served as Editor of IEEE Transactions on Electron Devices, President of the IEEE Electron Devices Society, and as a Member of the IEEE Board of Directors. His research spans silicon-based nanoelectronics, nanocarbon interconnects, and nanostructure interfaces. COR CLAEYS, PHD, is a Professor at KU Leuven, Belgium, and teaches internationally in Europe, China, India, and Brazil. A Fellow of both the Electrochemical Society and IEEE, he has co-edited books on low-temperature electronics and germanium-based technologies, authored four monographs, and contributed more than 1,400 technical papers and 16 book chapters. AROKIA NATHAN, PHD, is a Bye-Fellow and Tutor at Darwin College, University of Cambridge. With over 600 publications, six books, more than 150 patents, and four spin-off companies, he is a Fellow of the IEEE, IET (UK), Royal Academy of Engineering, Canadian Academy of Engineering, and the Society for Information Displays, and a Foreign Member of the Chinese Academy of Sciences. His research has advanced thin-film electronics and sensor technologies. BIN ZHAO, PHD, has been with SEMATECH, Rockwell, Conexant, Skyworks, Freescale, Fairchild, and OnSemi in advanced IC technology and product development. An IEEE Fellow, he holds more than 150 patents and has served as Founding Co-Chair of the RF/AMS Working Group for the International Technology Roadmap for Semiconductors, IEEE Conferences Committee Chair, and President of the IEEE Electron Devices Society.

• About the Editors xxiAbout the Contributors xxivA Special Tribute in Memory of Chih-Tang Sah [1932–2025] xxxvForeword xxxviiPreface xxxixHistory and Evolution of FET Technology1 The Miraculous Evolution of the Field-Effect Transistor (FET): From Inception to Future Prospects 1Hiroshi Iwai1.1 Introduction 21.2 1925–1960: Early Concepts and Challenges in MOSFET Development 81.3 1960–1970: The MOSFET Instability Problem 221.4 From MOS ICs to MOS LSIs: 1965–1969 251.5 Technologies for MOS Integrated Circuits Developed Between 1965 and 1970 291.6 First-Generation LSIs—Al- or Si-Gate PMOS LSIs (1969–1971) with 10–8 micrometer Design Rules 331.7 Second-Generation LSI: From the Dawn of NMOS LSI to the Mid-1970s 361.8 First Generation of VLSI (3 μm NMOS Technology: Fourth Generation of LSI) Late 1970s to Early 1980s: Emergence of Dry Processing and Stepper Lithography 441.9 Transition from NMOS to CMOS in the Mid-1980s 491.10 Advances in Scaling Technologies—Introduction of Novel Process Techniques and Materials (1980s to Early1990s) 521.11 Challenges in Scaling into the Sub-50 nm Regime from the Mid-1990s to the 2000s 601.12 Development of RF CMOS Device Technology from the Mid-1990s to the Late 1990s 681.13 Post-2000: Confronting the Limits of Miniaturization 721.14 Future Prospects 821.15 Summary and Concluding Remarks 842 MOSFET Device Structures and Physical Models: A Historical Review 109Yuan Taur2.1 MOSFET Device Structures 1092.2 MOSFET Physical Models 1212.3 Conclusion 1433 Field-Effect Transistor R&D in the United States: Past, Present, and Future 147Robert Chau and Suman Datta3.1 Introduction 1473.2 Early US FET R&D (1940s–1950s) 1483.3 Birth of the MOSFET at Bell Labs (1950s–1960s) 1493.4 Advent of CMOS as Low-Power Logic (1963–1970s) 1503.5 Moore's Law and the Classical Scaling Era (1980s–1990s) 1513.6 Moore's Law and the Era of Equivalent Scaling (Late 1990s–Early 2000s) 1533.7 Inflection Point for FETs (2025 and Beyond) 1603.8 FET Research in the Era of Zetta-Scale Computing (2030s) 1623.9 Conclusion 1654 Asia's FET R&D Innovations—Past, Present, Future 171Carlos H. Diaz and Akira Toriumi4.1 Introduction 1714.2 Asia's Rise in the Semiconductor Industry: 1960–1990s 1734.3 Logic Technology 1834.4 Memory Technology 1964.5 Thin Film Transistors (TFTs) 2024.6 Compound Semiconductors: III–V FETs 2044.7 Power FETs 2054.8 Concluding Remarks 2075 Fully Depleted SOI Technology—From Equation to Fabrication 221Thomas Skotnicki and Stephane Monfray5.1 Prologue (by Thomas Skotnicki) 2215.2 Introduction 2225.3 From Equation to Demonstration 2235.4 From Lab to Fab 2275.5 Technology Expansion and Scaling 2305.6 Summary and Perspective 233Applications and Process Integration6 MOS-Based RAM 237Jeonghoon Oh and Sangyeop Baeck6.1 DRAM Transistor Technology 2376.2 SRAM Transistor Technology 2616.3 Conclusion 2927 Development of Floating Gate FETs as Nonvolatile Memories 299Stefan K. Lai, Koji Sakui, and Riichiro Shirota7.1 Introduction 2997.2 EPROM and EEPROM 3007.3 NOR Flash 3037.4 NAND Flash 3087.5 Summary and Acknowledgment 3218 FET-Based Logic Devices and Systems 325Ghavam G. Shahidi8.1 Introduction 3258.2 From Dash-Dots and Relays to 0s and 1s and FETs 3288.3 From the Invention of FET to the First Commercial FET-Based Microprocessor 3288.4 The Quintessential FET-Based Device: The Personal Computer 3308.5 Microprocessors: Enabling Next Node Manufacturing 3328.6 Multiply-Accumulate: DSP, Digital Communications 335\8.7 The Ultimate FET-Based Device: The iPhone 3378.8 The Magnificent Computers: Data Centers (and the Environment) 3398.9 GPUs and AI: Not Enough FLOPs 3408.10 Energy Per Switch: How Much Lower? 3429 SiC FETs for High-Power and High-Temperature Electronics 353Tsunenobu Kimoto9.1 Introduction—SiC for High-Power and High-Temperature Applications 3539.2 Interface Properties and Channel Mobility in SiC MOSFETs 3589.3 SiC Power MOSFETs 3629.4 SiC Power JFETs and Comparison with Power MOSFETs, SiC Bipolar Switches 3779.5 SiC CMOS ICs 3819.6 SiC JFET ICs 3839.7 Applications and Future Outlook for SiC FETs 38610 III–V and III-N Field-Effect Transistors 395Giovanni Ghione and Matteo Meneghini10.1 III–V Field-Effect Transistors and ICs 39510.2 III-N Field-Effect Transistors 40410.3 Conclusions 41511 CMOS Image Sensors: Driving the Digital Imaging Era 429Yusuke Oike11.1 Introduction 42911.2 Historical Background and Fundamental Principles 43011.3 Technological Advancements in the 2000s 43411.4 Stacked Device Technologies 44011.5 Pixel Performance Metrics and Enhancement Technologies 44311.6 Extension of Sensing Capabilities 45211.7 Emerging Technologies and Future Trends 45912 The Thin-Film Transistor 475Yue Kuo and Arokia Nathan12.1 Original FET Concept and TFT Development History 47512.2 Market Size and Growth 47912.3 Structures, Thin-Film Materials, and Processes 47912.4 Device Figures of Merit and Compact Models 48112.5 Complex Material–Process–Device Relationship 48712.6 Applications in Flat Panel Displays, Circuits, and Beyond 48812.7 Emerging Applications and Challenges 49612.8 Summary 49813 How to Manufacture the Impossible: The Secrets of Process Integration for Hyper-scaled MOSFET Products 507Kelin J. Kuhn13.1 Introduction 50713.2 The Secret of Self-Alignment 50713.3 The Secret of Replacement Gate 51113.4 The Secret of Fully Depleted Channels 51513.5 What Happens Next? 52114 50 Years of RF CMOS Design 523Behzad Razavi14.1 1966–1969: RF CMOS Is Born 52314.2 1970: SPICE Is Born 52514.3 1980: An Integrated Direct-Conversion RX Is Reported 52614.4 Invasion of Analog Designers 52614.5 1986–1988: RF CMOS—Again 52714.6 1990s: High Integration and RF CMOS—Third Time Is a Charm 52714.7 1993: The ΔΣ Fractional-N Synthesizer Is Born 53114.8 Direct Conversion in CMOS 53114.9 1996: Cadence Introduces a Noise Simulator for Time-Variant Circuits 53214.10 2000s: Direct Conversion Matures 53314.11 Effect of Technology Scaling 53414.12 UWB, Cognitive, WiGig, and 5G Radios 53414.13 Multiband, Multimode Radios Prosper 53514.14 Phased-Array Transceivers 53614.15 Conclusion 53715 Compact FET-Based Device Modeling for Circuit Simulation 543Mitiko Miura-Mattausch and Hans Jürgen Mattausch15.1 Introduction 54415.2 Transistor Operations 54515.3 MOSFET Equations and Their Applications 54815.4 Compact Modeling: Different Approaches 55215.5 Compact Modeling: Model Standardization 55615.6 Advanced Compact Modeling Important for Accurate Circuit Simulation 56015.7 MOSFET-Descendant Compact Models for Wide Applications 57015.8 Advanced FET Generations 58115.9 Future Trends 58415.10 Circuit Design Perspectives 58415.11 Conclusion 58516 Evolution of Photolithography in Semiconductor Manufacturing 597Anthony Yen, Winfried Kaiser, and Akiyoshi Suzuki16.1 Introduction 59716.2 Contact/Proximity Printing of Integrated-Circuit Patterns 59916.3 1× Projection Imaging of Mask Patterns onWafer 60416.4 Step-and-Repeat Projection Lithography 60616.5 Deep Ultraviolet and Step-and-Scan Lithography 61316.6 193nm and (Ill-Fated) 157nm Lithography 62016.7 193nm Immersion Lithography and Multiple Patterning 62216.8 Extreme Ultraviolet Lithography 62416.9 Summary and Outlook 63117 Back-End-of-Line Interconnect Technology 651Takayuki Ohba and Takashi Yoda17.1 Introduction 65117.2 Technology Evolution of Interconnect Modules 65317.3 Emerging Era of Interconnects for Three-Dimensional Integration 66517.4 Connecting Variation and Beyond 66817.5 2.5D and 3D Processes Using Damascene Interconnects 67117.6 Conclusion and Future Directions in Interconnect Technology 673Current Status and Future Prospects18 Three-Dimensional Field-Effect Transistor—From Concept to Computing to Artificial Intelligence 685Digh Hisamoto and Samar K. Saha18.1 Introduction 68518.2 The Dawn of Semiconductor Devices and Computers 68718.3 The Emergence of the Transistor Computer 68918.4 Golden Age of Planar MOSFETs 69218.5 Domain-Specific Hardware Era—The Emergence of Three-Dimensional Transistor: FinFET 69518.6 Conclusions 70219 Developments of GAAFET Technologies and Future Challenges 709Dong-Won Kim19.1 Introduction: Scaling limitations of Planar MOSFET and FinFET 71019.2 Comparison of GAAFETs Candidates and Development History 71519.3 Operation of GAAFET 72119.4 Enhanced Design Considerations for GAAFET with Significant Modifications in Structural Components 73519.5 Reliability Insights and Challenges in GAA MBCFET 75219.6 Design Technology Co-Optimization for GAA MBCFET 75719.7 Future of GAA MBCFET: Transition from Horizontal Scaling to Three-Dimensional Scaling 76319.8 Conclusion 77120 Contact Engineering and Performance Challenges in 2D-FETs 779Chandan Biswas and Deji Akinwande20.1 Introduction 77920.2 Challenges in Electronic Properties of 2D Material Integration 79020.3 Contact Engineering in 2D-FETs 79320.4 Quantum Limit of Contact Resistance in 2D Field-Effect Transistors 79920.5 Summary and Path Forward 80421 Carrier Transport in MOSFETs: From Lilienfeld to Landauer 813Mark Lundstrom21.1 Introduction 81321.2 A Focus on the Source 81421.3 Drift-Diffusion Transport and Current Saturation in MOSFETs (~1960–1980) 81521.4 The Velocity-Saturated MOSFET (~1980–1990) 81721.5 Non-Local Transport in Deep-Submicron MOSFETs (~1985–2000) 81821.6 The Ballistic MOSFET (~1994–2005) 82221.7 The Quasi-Ballistic MOSFET (~1995–2015) 82421.8 Quantum Transport (~1995–2015) 82721.9 Discussion 82921.10 Conclusions 83122 What Is Next for FET? 839Tsu-Jae K. Liu, Tahir Ghani, and Carolyn Duran22.1 Introduction 84022.2 Tunnel Field-Effect Transistors 84822.3 Negative Capacitance FET 85622.4 High-Mobility Channel Transistors 86722.5 Nano-Electromechanical Switch (NEMS) 88022.6 Sustainability 88922.7 Summary and Concluding Remarks 893References 895Index 903