Parameter-Centric Scaled FET Devices

Dr. Nabil Shovon Ashraf was born on 10th of August 1974 in Dhaka, Bangladesh and grew up in Dhaka, Bangladesh. He obtained  B.Tech in electrical engineering from IIT Kanpur India in May 1997, M.S. degree from the University of Central Florida, Orlando, Florida, USA in August 1999 in Electrical Engineering, and PhD degree from the Electrical Engineering Department of Arizona State University, Tempe, Arizona, USA in December 2011. He was a post-doctoral researcher at Arizona State University Electrical Engineering Department between 2011 and 2014. From August 1999 to March 2001, he was employed as a SAW filter design engineer in RF Monolithic Inc, Dallas, Texas, USA.He served in various universities in Dhaka, Bangladesh as an Electrical and Electronic Engineering faculty from 2002 to 2006. After returning to Dhaka, Bangladesh in February 2014 after completion of Post Doctoral work, he served as Assistant Professor from September 2014 and then Associate Professor from April 2018 in the ECE department of North South University, Dhaka, Bangladesh until May 2022. Presently, he conducts independent research in the field of semiconductor device scaling, modeling, and device physics study of advanced FET architectures.He authored two books that were published by Morgan & Claypool in 2016 and 2018. These books are currently available from Springer Nature. To-date, he has also authored eight journals and about 15 conference papers along with eight book Chapters. He was also the recipients of Albert Nelson Marquis Lifetime Achievement Award in 2017, listed in the 69th edition and the 70th platinum edition of author biographees in Marquis Who's Who in America publications.

• Chapter 1: Accurate parameter extraction for silicon-based Field Effect Transistors (FET).- Chapter 2: Effective mass of density of states (DOS) for electron and hole in silicon.-Chapter 3: Scattering events in silicon in room temperature and cryogenic temperature.- Chapter 4: Precise determination of incomplete ionization in presence of degenerate doping and band non parabolicity, and determination of intrinsic carrier concentration in n-type and p-type silicon.- Chapter 5: Neutral impurity scattering and its effect on mobility on n and p-FETs and effect of cryogenic temperature on neutral impurity scattering.- Chapter 6: Device physics and parameter modeling at cryogenic temperature.-Chapter 7: Advanced lithography based high volume manufacturing.- Chapter 8: Performance review of gate-all-around (GAA) nanowire FETs.- Chapter 9: Performance review of stacked nanosheet complementary FETs (C-FET).