Adam Osseiran – författare

This book contains extended and revised versions of the best papers that were presented during the thirteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a Global System-on-a-Chip Design & CAD conference. The 13th conference was held at the Parmelia Hilton Hotel, Perth, Western Australia (October 17-19, 2005). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier and Darmstadt. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, is to provide a forum to exchange ideas and show industrial and academic research results in the field of mic- electronics design. The current trend toward increasing chip integ- tion and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SOC conferences aim to address these exciting new issues. The 2005 edition of VLSI-SoC maintained the traditional structure, which has been successful at the previous VLSI-SOC conferences. The quality of submissions (107 papers from 26 countries) made the selection process difficult, but finally 63 papers and 25 posters were accepted for presentation in VLSI-SoC 2005. Out of the 63 full papers presented at the conference, 20 were chosen by a selection committee to have an extended and revised version included in this book. These selected papers came from Australia, Brazil, France, Germany, Italy, Korea, Portugal, Sweden, Switzerland, United Kingdom and the United States of America. x Preface

This book contains extended and revised versions of the best papers that were presented during the thirteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a Global System-on-a-Chip Design & CAD conference. The 13th conference was held at the Parmelia Hilton Hotel, Perth, Western Australia (October 17-19, 2005). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier and Darmstadt. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, is to provide a forum to exchange ideas and show industrial and academic research results in the field of mic- electronics design. The current trend toward increasing chip integ- tion and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SOC conferences aim to address these exciting new issues. The 2005 edition of VLSI-SoC maintained the traditional structure, which has been successful at the previous VLSI-SOC conferences. The quality of submissions (107 papers from 26 countries) made the selection process difficult, but finally 63 papers and 25 posters were accepted for presentation in VLSI-SoC 2005. Out of the 63 full papers presented at the conference, 20 were chosen by a selection committee to have an extended and revised version included in this book. These selected papers came from Australia, Brazil, France, Germany, Italy, Korea, Portugal, Sweden, Switzerland, United Kingdom and the United States of America. x Preface

This book contains more than the IEEE Standard 1149.4. It also contains the thoughts of those who developed the standard. Adam Osseiran has edited the original writings of Brian Wilkins, Colin Maunder, Rod Tulloss, Steve Sunter, Mani Soma, Keith Lofstrom and John McDermid, all of whom have personally contributed to this standard. To preserve the original spirit, only minor changes were made, and the reader will sense a chapter-to-chapter variation in the style of expression. This may appear awkward to some, although I found the Iack of monotonicity refreshing. A system consists of a specific organization of parts. The function of the system cannot be performed by an individual part or even a disorganized collection ofthe same parts. Testing has a system-like characteristic. Testing of a system does not follow directly from the testing of its parts, and a system built with testable parts can sometimes be impossible to test. Therefore, testability of the system must be organized. Some years ago, the IEEE published the boundary-scan Standard 1149.1. That Standard provided an architecture for digital VLSI chips. The chips designed with the 1149.1 architecture can be integrated into a testable system. However, many systems today contain both analog and digital chips. Even if all digital chips are compliant with the standard, the testability of a mixed-signal system cannot be guaranteed. The new Standard 1149.4, described in this book, extends the previous architecture to mixed-signal systems.

This book contains extended and revised versions of the best papers that were presented during the thirteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a Global System-on-a-Chip Design & CAD conference. The 13th conference was held at the Parmelia Hilton Hotel, Perth, Western Australia (October 17-19, 2005). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier and Darmstadt. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, is to provide a forum to exchange ideas and show industrial and academic research results in the field of mic- electronics design. The current trend toward increasing chip integ- tion and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SOC conferences aim to address these exciting new issues. The 2005 edition of VLSI-SoC maintained the traditional structure, which has been successful at the previous VLSI-SOC conferences. The quality of submissions (107 papers from 26 countries) made the selection process difficult, but finally 63 papers and 25 posters were accepted for presentation in VLSI-SoC 2005. Out of the 63 full papers presented at the conference, 20 were chosen by a selection committee to have an extended and revised version included in this book. These selected papers came from Australia, Brazil, France, Germany, Italy, Korea, Portugal, Sweden, Switzerland, United Kingdom and the United States of America. x Preface

This book contains more than the IEEE Standard 1149.4. It also contains the thoughts of those who developed the standard. Adam Osseiran has edited the original writings of Brian Wilkins, Colin Maunder, Rod Tulloss, Steve Sunter, Mani Soma, Keith Lofstrom and John McDermid, all of whom have personally contributed to this standard. To preserve the original spirit, only minor changes were made, and the reader will sense a chapter-to-chapter variation in the style of expression. This may appear awkward to some, although I found the Iack of monotonicity refreshing. A system consists of a specific organization of parts. The function of the system cannot be performed by an individual part or even a disorganized collection ofthe same parts. Testing has a system-like characteristic. Testing of a system does not follow directly from the testing of its parts, and a system built with testable parts can sometimes be impossible to test. Therefore, testability of the system must be organized. Some years ago, the IEEE published the boundary-scan Standard 1149.1. That Standard provided an architecture for digital VLSI chips. The chips designed with the 1149.1 architecture can be integrated into a testable system. However, many systems today contain both analog and digital chips. Even if all digital chips are compliant with the standard, the testability of a mixed-signal system cannot be guaranteed. The new Standard 1149.4, described in this book, extends the previous architecture to mixed-signal systems.