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Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault tolerant techniques for programmable logic applications.
1 596 kr
Skickas inom 10-15 vardagar
Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in the recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.
VLSI-SOC: From Systems to Chips
IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany
Inbunden, Engelska, 2006
1 066 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers that have been presented during the twelfth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a Global System-on-a-Chip Design & CAD Conference. The 12* edition was held at the Lufthansa Training Center in Seeheim-Jugenheim, south of Darmstadt, Germany (December 1-3, 2003). Previous conferences have taken place in Edinburgh (81), Trondheim (83), Tokyo (85), Vancouver (87), Munich (89), Edinburgh (91), Grenoble (93), Tokyo (95), Gramado (97), Lisbon (99)andMontpellier(01). The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, is to provide a forum to exchange ideas and show research results in the field of microelectronics design. The current trend toward increasing chip integration brings about exhilarating new challenges both at the physical and system-design levels: this conference aims to address these exciting new issues. The 2003 edition of VLSI-SoC conserved the traditional structure, which has been successful in previous editions. The quality of submissions (142 papers) made the selection process difficult, but finally 57 papers and 14 posters were accepted for presentation in VLSI-SoC 2003. Submissions came from Austria, Bulgaria, Brazil, Canada, Egypt, England, Estonia, Finland, France, Germany, Greece, Hungary, India, Iran, Israel, Italy, Japan, Korea, Malaysia, Mexico, Netherlands, Poland, Portugal, Romania, Spain, Sweden, Taiwan and the United States of America. From 57 papers presented at the conference, 18 were selected to have an extended and revised version included in this book.
VLSI-SoC: From Systems to Silicon
IFIP TC10/ WG 10.5 Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2005), October 17-19, 2005, Perth, Australia
Inbunden, Engelska, 2007
1 066 kr
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This book contains extended and revised versions of the best papers that were presented during the thirteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a Global System-on-a-Chip Design & CAD conference. The 13th conference was held at the Parmelia Hilton Hotel, Perth, Western Australia (October 17-19, 2005). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier and Darmstadt. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, is to provide a forum to exchange ideas and show industrial and academic research results in the field of mic- electronics design. The current trend toward increasing chip integ- tion and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SOC conferences aim to address these exciting new issues. The 2005 edition of VLSI-SoC maintained the traditional structure, which has been successful at the previous VLSI-SOC conferences. The quality of submissions (107 papers from 26 countries) made the selection process difficult, but finally 63 papers and 25 posters were accepted for presentation in VLSI-SoC 2005. Out of the 63 full papers presented at the conference, 20 were chosen by a selection committee to have an extended and revised version included in this book. These selected papers came from Australia, Brazil, France, Germany, Italy, Korea, Portugal, Sweden, Switzerland, United Kingdom and the United States of America. x Preface
VLSI-SoC: Research Trends in VLSI and Systems on Chip
Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France
Inbunden, Engelska, 2007
1 098 kr
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This book contains extended and revised versions of the best papers that were presented during the fourteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a global System-on-a-Chip Design & CAD conference. The 14th conference was held at the Hotel Boscolo, Nice, France (October 16-18, 2006). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier, Darmstadt and Perth. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5 and by the IEEE Council on Electronic Design Automation (CEDA), is to provide a forum to exchange ideas and show industrial and academic research results in the field of microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI- SOC conferences aim to address these exciting new issues.
1 098 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers that were presented during the fifteenth edition of the IFIP/IEEE WG10.5 International Conference on Very Large Scale Integration, a global System-on-a-Chip Design & CAD conference. The 15th conference was held at the Georgia Institute of Technology, Atlanta, USA (October 15-17, 2007). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier, Darmstadt, Perth and Nice. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5 and by the IEEE Council on Electronic Design Automation (CEDA), is to provide a forum to exchange ideas and show industrial and academic research results in the field of microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SoC conferences aim to address these exciting new issues.
Crash Course on Crises
Macroeconomic Concepts for Run-Ups, Collapses, and Recoveries
Inbunden, Engelska, 2023
292 kr
Skickas inom 5-8 vardagar
An incisive overview of the macroeconomics of financial crises—essential reading for students and policy experts alikeWith alarming frequency, modern economies go through macro-financial crashes that arise from the financial sector and spread to the broader economy, inflicting deep and prolonged recessions. A Crash Course on Crises brings together the latest cutting-edge economic research to identify the seeds of these crashes, reveal their triggers and consequences, and explain what policymakers can do about them.Each of the book’s ten self-contained chapters introduces readers to a key economic force and provides case studies that illustrate how that force was dominant. Markus Brunnermeier and Ricardo Reis show how the run-up phase of a crisis often occurs in ways that are preventable but that may go unnoticed and discuss how debt contracts, banks, and a search for safety can act as triggers and amplifiers that drive the economy to crash. Brunnermeier and Reis then explain how monetary, fiscal, and exchange-rate policies can respond to crises and prevent them from becoming persistent.With case studies ranging from Chile in the 1970s to the COVID-19 pandemic, A Crash Course on Crises synthesizes a vast literature into ten simple, accessible ideas and illuminates these concepts using novel diagrams and a clear analytical framework.
Crash Course on Crises
Macroeconomic Concepts for Run-Ups, Collapses, and Recoveries
Häftad, Engelska, 2025
210 kr
Skickas inom 5-8 vardagar
An incisive overview of the macroeconomics of financial crises—essential reading for students and policy experts alikeWith alarming frequency, modern economies go through macro-financial crashes that arise from the financial sector and spread to the broader economy, inflicting deep and prolonged recessions. A Crash Course on Crises brings together the latest cutting-edge economic research to identify the seeds of these crashes, reveal their triggers and consequences, and explain what policymakers can do about them.Each of the book’s ten self-contained chapters introduces readers to a key economic force and provides case studies that illustrate how that force was dominant. Markus Brunnermeier and Ricardo Reis show how the run-up phase of a crisis often occurs in ways that are preventable but that may go unnoticed and discuss how debt contracts, banks, and a search for safety can act as triggers and amplifiers that drive the economy to crash. Brunnermeier and Reis then explain how monetary, fiscal, and exchange-rate policies can respond to crises and prevent them from becoming persistent.With case studies ranging from Chile in the 1970s to the COVID-19 pandemic, A Crash Course on Crises synthesizes a vast literature into ten simple, accessible ideas and illuminates these concepts using novel diagrams and a clear analytical framework.
1 596 kr
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Radiation Effects on Embedded Systems aims at providing the reader with the major guidelines for coping with radiation effects on components supposed to be included in today’s applications devoted to operate in space, but also in the atmosphere at high altitude or at ground level. It contains a set of chapters based on the tutorials presented at the International School on Effects of Radiation on Embedded Systems for Space Applications (SERESSA) that was held in Manaus, Brazil, from 20 to 25 November 2005.This book will provide all IC engineers with useful information regarding outside (environmental) influences on their designs and is an excellent reference.
1 392 kr
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Design of System on a Chip is the first of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in Brazil in the recent years by prominent authors from all over the world. In particular the first book deals with components and circuits. Device models have to satisfy the conditions to be computationally economical in addition to be accurate and to scale over various generations of technology. In addition the book addresses issues of the parasitic behavior of deep sub-micron components, such as parameter variations and sub-threshold effects. Furthermore various authors deal with items like mixed signal components and memories. We wind up with an exposition of the technology problems to be solved if our community wants to maintain the pace of the "International Technology Roadmap for Semiconductors" (ITRS).
1 501 kr
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This book contains a selection of tutorials on hot topics in information technology, which were presented at the IFIP World Computer Congress. WCC2004 took place at the Centre de Congrès Pierre Baudis, in Toulouse, France, from 22 to 27 August 2004. The 11 chapters included in the book were chosen from tutorials proposals submitted to WCC2004. These papers report on several important and state-of-the-art topics on information technology such as: Quality of Service in Information Networks Risk-Driven Development of Security-Critical Systems Using UMLsec Developing Portable Software Formal Reasoning About Systems, Software and Hardware Using Functionals, Predicates and Relations The Problematic of Distributed Systems Supervision Software Rejuvenation - Modeling and Analysis Test and Design-for-Test of Mixed-Signal Integrated Circuits Web Services Applications of Multi-Agent Systems Discrete Event Simulation Human-Centered Automation We hereby would like to thank IFIP and more specifically WCC2004 Tutorials Committee and the authors for their contribution. We also would like to thank the congress organizers who have done a great job. Ricardo Reis Editor QUALITY OF SERVICE IN INFORMATION NETWORKS Augusto Casaca IST/INESC, R. Alves Redol, 1000-029, Lisboa, Portugal. Abstract: This article introduces the problems concerned with the provision of end-- end quality of service in IP networks, which are the basis of information networks, describes the existing solutions for that provision and presents some of the current research items on the subject. Key words: Information networks, IP networks, Integrated Services, Differentiated Services, Multiprotocol Label Switching, UMTS.
Del 32 - Frontiers in Electronic Testing
Fault-Tolerance Techniques for SRAM-Based FPGAs
Häftad, Engelska, 2010
1 066 kr
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Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault tolerant techniques for programmable logic applications.
1 596 kr
Skickas inom 10-15 vardagar
Design of Systems on a Chip: Design&Test is the second of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in the recent years by prominent authors from all over the world. Technology, productivity and quality are the main aspects under consideration to establish the major requirements for the design and test of upcoming systems on a chip. In particular this second book include contributions on three different, but complementary axes: core design, computer-aided design tools and test methods. A collection of chapters deal with the heterogeneity aspect of core designs, showing the diversity of parts that may share the same substrate in a state-of-the-art system on a chip. The second part of the book discusses CAD in three different levels of design abstraction, from system level to physical design. The third part deals with test methods. The topic is addressed from different viewpoints: in terms of chip complexity, test is discussed from the core and system prospective; in terms of signal heterogeneity, the digital, mixed-signal and microsystem prospective are considered.Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field Programmable Gate Arrays, customizable by SRAM cells, are a consequence of the integrated circuit evolution with millions of memory cells to implement the logic, embedded memories, routing, and more recently with embedded microprocessors cores. These re-programmable systems-on-chip platforms must be fault-tolerant to cope with present days requirements. This book discusses fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs). It starts by showing the model of the problem and the upset effects in the programmable architecture. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. A large set of methods for designing fault tolerance systems in SRAM-based FPGAs is described. Some presented techniques are based on developing a new fault-tolerant architecture with new robustness FPGA elements. Other techniques are based on protecting the high-level hardware description before the synthesis in the FPGA. The reader has the flexibility of choosing the most suitable fault-tolerance technique for its project and to compare a set of fault toleranttechniques for programmable logic applications.
VLSI-SOC: From Systems to Chips
IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany
Häftad, Engelska, 2010
1 066 kr
Skickas inom 10-15 vardagar
This book presents extended and revised versions of the best papers that were presented during the twelfth edition of the IFIP TC10 Working Group 10.5 International Conference on Very Large Scale Integration. The purpose of this conference was to provide a forum to exchange ideas and show research results in the field of microelectronics design. The current trend toward increasing chip integration brings about exhilarating new challenges both at the physical and system-design levels. This book aims to address these exciting issues.
VLSI-SoC: From Systems to Silicon
IFIP TC10/ WG 10.5 Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2005), October 17-19, 2005, Perth, Australia
Häftad, Engelska, 2010
1 066 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers that were presented during the thirteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a Global System-on-a-Chip Design & CAD conference. The 13th conference was held at the Parmelia Hilton Hotel, Perth, Western Australia (October 17-19, 2005). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier and Darmstadt. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, is to provide a forum to exchange ideas and show industrial and academic research results in the field of mic- electronics design. The current trend toward increasing chip integ- tion and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SOC conferences aim to address these exciting new issues. The 2005 edition of VLSI-SoC maintained the traditional structure, which has been successful at the previous VLSI-SOC conferences. The quality of submissions (107 papers from 26 countries) made the selection process difficult, but finally 63 papers and 25 posters were accepted for presentation in VLSI-SoC 2005. Out of the 63 full papers presented at the conference, 20 were chosen by a selection committee to have an extended and revised version included in this book. These selected papers came from Australia, Brazil, France, Germany, Italy, Korea, Portugal, Sweden, Switzerland, United Kingdom and the United States of America. x Preface
VLSI-SoC: Research Trends in VLSI and Systems on Chip
Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France
Häftad, Engelska, 2010
1 098 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers that were presented during the fourteenth edition of the IFIP TC10/WG10.5 International Conference on Very Large Scale Integration, a global System-on-a-Chip Design & CAD conference.
1 098 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers that were presented during the fifteenth edition of the IFIP/IEEE WG10.5 International Conference on Very Large Scale Integration, a global System-on-a-Chip Design & CAD conference. The 15th conference was held at the Georgia Institute of Technology, Atlanta, USA (October 15-17, 2007). Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble, Tokyo, Gramado, Lisbon, Montpellier, Darmstadt, Perth and Nice. The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5 and by the IEEE Council on Electronic Design Automation (CEDA), is to provide a forum to exchange ideas and show industrial and academic research results in the field of microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels, as well in the test of these systems. VLSI-SoC conferences aim to address these exciting new issues.
1 352 kr
Skickas inom 10-15 vardagar
Design of System on a Chip is the first of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the compilations of tutorials presented at workshops in Brazil in the recent years by prominent authors from all over the world. In particular the first book deals with components and circuits. Device models have to satisfy the conditions to be computationally economical in addition to be accurate and to scale over various generations of technology. In addition the book addresses issues of the parasitic behavior of deep sub-micron components, such as parameter variations and sub-threshold effects. Furthermore various authors deal with items like mixed signal components and memories. We wind up with an exposition of the technology problems to be solved if our community wants to maintain the pace of the "International Technology Roadmap for Semiconductors" (ITRS).
1 501 kr
Skickas inom 10-15 vardagar
This volume reports on several important and state-of-the-art topics in information technology, including: / Quality of Service in Information Networks / Risk-Driven Development of Security-Critical Systems Using UMLsec / Developing Portable Software/ Formal Reasoning about Systems, Software and Hardware Using Functionals, Predicates and Relations / The Problematic of Distributed Systems Supervision / Software Rejuvenation --- Modeling and Analysis / Test and Design-for-Test of Mixed-Signal Integrated Circuits / Web Services/ Applications of Multi-Agent Systems / Discrete Event Simulation / Human-Centered Automation. Information Technology: Selected Tutorials comprises papers presented at the IFIP 18th World Computer Congress, which was held in August 2004 in Toulouse, France and sponsored by the International Federation for Information Processing (IFIP).
1 066 kr
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This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.
653 kr
Skickas inom 5-8 vardagar
1 096 kr
Skickas inom 10-15 vardagar
This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.
858 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers presented at the 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, held in Abu Dhabi, United Arab Emirates, in August 2017.
607 kr
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This book contains extended and revised versions of the best papers presented at the 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, held in Abu Dhabi, United Arab Emirates, in August 2017.
554 kr
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This book contains extended and revised versions of the best papers presented at the 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, held in Verona, Italy, in October 2018.The 13 full papers included in this volume were carefully reviewed and selected from the 27 papers (out of 106 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
554 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers presented at the 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, held in Verona, Italy, in October 2018.The 13 full papers included in this volume were carefully reviewed and selected from the 27 papers (out of 106 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
VLSI-SoC: New Technology Enabler
27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6–9, 2019, Revised and Extended Selected Papers
Inbunden, Engelska, 2020
554 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019.The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
VLSI-SoC: New Technology Enabler
27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6–9, 2019, Revised and Extended Selected Papers
Häftad, Engelska, 2021
554 kr
Skickas inom 10-15 vardagar
This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019.The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
Soft Error Reliability Using Virtual Platforms
Early Evaluation of Multicore Systems
Inbunden, Engelska, 2020
1 066 kr
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This book describes the benefits and drawbacks inherent in the use of virtual platforms (VPs) to perform fast and early soft error assessment of multicore systems.
Soft Error Reliability Using Virtual Platforms
Early Evaluation of Multicore Systems
Häftad, Engelska, 2021
1 066 kr
Skickas inom 10-15 vardagar
This book describes the benefits and drawbacks inherent in the use of virtual platforms (VPs) to perform fast and early soft error assessment of multicore systems.