VLSI-SOC: From Systems to Chips

IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany

AvManfred Glesner,Ricardo Reis

Häftad, Engelska, 2010

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Beskrivning

This book presents extended and revised versions of the best papers that were presented during the twelfth edition of the IFIP TC10 Working Group 10.5 International Conference on Very Large Scale Integration. The purpose of this conference was to provide a forum to exchange ideas and show research results in the field of microelectronics design. The current trend toward increasing chip integration brings about exhilarating new challenges both at the physical and system-design levels. This book aims to address these exciting issues.

Produktinformation

Utgivningsdatum:2010-11-19
Mått:155 x 235 x 18 mm
Vikt:499 g
Format:Häftad
Språk:Engelska
Serie:IFIP Advances in Information and Communication Technology
Antal sidor:314
Förlag:Springer-Verlag New York Inc.
ISBN:9781441941268

Utforska kategorier

Innehållsförteckning

Effect of Power Optimizations on Soft Error Rate.- Dynamic Models for Substrate Coupling in Mixed-Mode Systems.- Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs.- Automated Conversion of SystemC Fixed-Point Data Types.- Exploration of Sequential Depth by Evolutionary Algorithms.- Validation of Asynchronous Circuit Specifications Using IF/CADP.- On-Chip Property Verification Using Assertion Processors.- Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems.- A Switched Opamp Based 10 Bits Integrated ADC for Ultra Low Power Applications.- Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans.- Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures.- Optimizing SOC Test Resources Using Dual Sequences.- A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits.- Low Power Java Processor for Embedded Applications.- Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes.- Evaluation Methodology for Single Electron Encoded Threshold Logic Gates.- Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath.- Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths.- Stuck-At-Fault Testability of SPP Three-Level Logic Forms.