Kwang-Ting (Tim) Cheng – författare
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9 produkter
Electronic Design Automation
Synthesis, Verification, and Test
Av Kwang-Ting (Tim) Cheng, Yao-Wen Chang m. fl.
E-bok, 2009
962 kr
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This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, …
Electronic Design Automation
Synthesis, Verification, and Test
Av Laung-Terng Wang, Yao-Wen Chang m. fl.
Inbunden, 2009
1034 kr
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This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, …
Formal Equivalence Checking and Design Debugging
Av Shi-Yu Huang, Kwang-Ting (Tim) Cheng
Inbunden, 1998
2029 kr
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Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to …
Delay Fault Testing for VLSI Circuits
Av Angela Krstic, Kwang-Ting (Tim) Cheng
Inbunden, 1998
1643 kr
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With the ever-increasing speed of integrated circuits, violations of the performance specifications are becoming a major factor affecting the product quality level. The need for testing timing defects is further expected to grow with the late 20th-century design trend of moving towards deep …
Unified Methods for VLSI Simulation and Test Generation
Av Kwang-Ting (Tim) Cheng, Vishwani D. Agrawal
Inbunden, 1989
1098 kr
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Delay Fault Testing for VLSI Circuits
Av Angela Krstic, Kwang-Ting (Tim) Cheng
Häftad, 2012
1643 kr
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In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, our expectations on speed have soared. A …
Formal Equivalence Checking and Design Debugging
Av Shi-Yu Huang, Kwang-Ting (Tim) Cheng
Häftad, 2012
1970 kr
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Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to …
Delay Fault Testing for VLSI Circuits
Av Kwang-Ting (Tim) Cheng, Angela Krstic
E-bok, 2012
2111 kr
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In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, our expectations on speed have soared. A …
Formal Equivalence Checking and Design Debugging
Av Kwang-Ting (Tim) Cheng, Shi-Yu Huang
E-bok, 2012
2543 kr
Lägg i varukorg
Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to …