Werner Damm - Böcker

Dieses Buch stellt eine Methodik zum systematischen Entwurf korrekter Mikroprogramme vor. Behandelt werden sämtliche Phasen der Firmwareentwicklung: das Erstellen einer formalen Beschreibung der Anforderungen, Techniken zur hierarchischen Organisation des Entwurfs, die Mikroprogrammierung in einer geeigneten höheren Mikroprogrammiersprache, sowie formale Techniken zur Überprüfung der Korrektheit des Entwurfs. Damit wird erstmals eine Firmwareverifikationsmethode vorgestellt, die sowohl für beliebige Mikroarchitekturen einsetzbar ist als auch eine inkrementelle und modulare Verifikation des Entwurfs ermöglicht. Besonderes Gewicht wurde sowohl auf eine präzise mathematische Durchdringung des Firmwareentwurfs als auch auf die praktische Anwendbarkeit der Entwurfsmethode gelegt. Sämtliche Konzepte und Techniken werden an Hand eines Emulationsbeispiels illustriert. Der Text enthält ein einführendes Kapitel, das sowohl die Grundbegriffe aus dem Bereich der Mikroprogrammierung als auch die verwendeten mathematischen Begriffsbildungen zusammenfaßt. Die beiden Hauptteile behandeln jeweils den Entwurf sowie die Verifikationsmethodik. In Anhängen werden ausführliche Entwurfs- und Verifikationsbeispiele gegeben. Das Buch bietet sowohl dem Entwickler größerer Mikroprogramme als auch dem Ersteller von Firmwareentwicklungswerkzeugen einen geeigneten Rahmen zur Beherrschung der Komplexität von Mikroarchitekturen. Für Studenten der Informatik veranschaulicht der Text die Relevanz mathematischer Modellbildungen in einem konkreten Anwendungesgebiet.

This volume is a documentation of the main results in the research area "In- gration of Software Speci?cation Techniques for Applications in Engineering". On one hand it is based on the Priority Program "Integration von Techniken der Softwarespezi?kation fur .. ingenieurwissenschaftliche Anwendungen", short Soft- Spez,oftheGermanResearchCouncil(DFG). Ontheotherhanditcontainsnew contributions of international experts in this research area, some of which were presented at the third international workshop INT 2004 on "Integration of Sp- i?cation Techniques for Applications in Engineering". INT 2004 was launched as a satellite event of ETAPS in Barcelona, the "European Joint Conferences on Theory and Practice of Software". The Priority Program SoftSpez was initiated by W. Brauer, M. Broy, H. Ehrig, H. J. Kreowski, H. Reichel, and H. Weber concerning di?erent aspects from computer science, and by E. Schnieder and E. Westk. amper concerning two main application areas in engineering, namely "Tra?c Control Systems" and "Production Automation". After acceptance of SoftSpez by the German Research Council for the period of 1998-2004 a call for speci?c projects within this priority program was launched, where 11 projects from about 75 project proposals were accepted for a period of two years.Since 1998 each year the main research proposals and results of the projects have been presented at an annual colloquium of the priority program, and every two years the projects have been evaluated by an independent group of referees appointed by the G- man Research Council. At this point we would like to thank A.

This book constitutes the refereed proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems, FTRTFT 2002, held in Oldenburg, Germany, in September 2002. The 17 revised full papers presented together with 2 invited tutorials and 6 invited papers were carefully reviewed and selected from 39 submissions. The papers are organized in topical sections on synthesis and scheduling, timed automata, bounded model checking, verification and conformance testing, and UML models and model checking.

Formal methods for hardware design still find limited use in industry. Yet current practice has to change to cope with decreasing design times and increasing quality requirements. This research report presents results from the Esprit project FORMAT (formal methods in hardware verification) which involved the collaboration of the enterprises Siemens, Italtel, Telefonica I+D, TGI, and AHL, the research institute OFFIS, and the universities of Madrid and Passau. The work presented involves advanced specification languages for hardware design that are intuitive to the designer, like timing diagrams and state based languages, as well as their relation to VHDL and formal languages like temporal logic and a process-algebraic calculus. The results of experimental tests of the tools are also presented.

This volume contains the proceedings of the International Conference on C- puter Aided Veri?cation (CAV), held in Berlin, Germany, July 3–7, 2007. CAV 2007 was the 19th in a series of conferences dedicated to the advancement of the theory and practice of computer-assisted formal analysis methods for software and hardware systems. The conference covers the spectrum from theoretical - sults to concrete applications, with an emphasis on practical veri?cation tools and the algorithms and techniques that are needed for their implementation. We received 134 regular paper submissions and 39 tool paper submissions. Of these, the ProgramCommittee selected 33 regularpapersand 14 toolpapers. Each submission was reviewed by at least three members of the Program C- mittee. The reviewing process included a PC review meeting, and – for the ?rst time in the history of CAV – an author feedback period. About 50 additional reviews were provided by experts external to the Program Committee to assure a high quality selection. The CAV 2007 program included three invited talks from industry: – Byron Cook (Microsoft Research) on Automatically Proving Program T- mination, – David Russino? (AMD) on A Mathematical Approach to RTL Veri?cation, and – Thomas Kropf (Bosch) on Software Bugs Seen from an Industrial Persp- tive.