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8 produkter
8 produkter
1 062 kr
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This is a book for engineers concerned with jitter: the e ects of noise visible in the time domain. The material presented will be helpful for work at both the system level and the circuit level: At the system level, the challenge is to describe, specify, and measure time domain uncertainty and when necessary, relate jitter to phase noise speci cations in the frequency domain. At the circuit level, the challenge is to design low noise circuitry within power, area, and process constraints so that ultimate performance meets system level requirements. Throughout the book concepts are presented in the context of an - gineering application requiring low jitter performance: the voltage controlled oscillator (VCO) used in a phase-locked loop (PLL). Techniques are presented for circuit-level design of low jitter delay elements for use in ring oscillators, as well as relating the circuit-level characteristics to system-level performance. Although the emphasis is on time-domain (jitter) measures of oscillator p- formance, a simple method of translating performance to frequency domain (phase noise) measures is presented as well. Structure of this Book This book is divided into nine chapters. The diagram on the following page shows the relationship between material in each chapter as well as placement in the system-level vs. circuit-level design hierarchy. Wherever possible, - perimental veri cation is presented in the same chapter as the corresponding theoretical development, rather than being isolated in a separate chapter.
2 644 kr
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This is a guide to circuit simulators from a designer's perspective: the pitfalls of circuit simulation, such as convergence and accuracy problems, are documented. The text gives designers insight into why these problems occur and how to avoid them. It also provides practical advice on how to make many difficult measurements with a circuit simulator, such as loop gain of an op-amp or distortion measurements of such clocked circuits as d-to-a converters and sample-and-hold circuits. Finally, suggestions are given about how to handle difficult classes of circuits, such as oscillators, charge-storage or very large circuits.
1 800 kr
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Chapter 2 summarizes the fundamentals of phase noise and timing jitter and discusses earlier works on oscillator's phase noise analysis. Chapter 3 and Chapter 4 analyze the physical mechanisms behind phase noise generation in current-biased and Colpitts oscillators.
1 963 kr
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The Verilog Hardware Description Language (Verilog-HDL) has long been the most popular language for describing complex digital hardware. Verilog-AMS combines both Verilog-HDL and Verilog-A, and adds additional mixed-signal constructs, providing a hardware description language suitable for analog, digital, and mixed-signal systems.
1 289 kr
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This is a book for engineers concerned with jitter: the e ects of noise visible in the time domain. The material presented will be helpful for work at both the system level and the circuit level: At the system level, the challenge is to describe, specify, and measure time domain uncertainty and when necessary, relate jitter to phase noise speci cations in the frequency domain. At the circuit level, the challenge is to design low noise circuitry within power, area, and process constraints so that ultimate performance meets system level requirements. Throughout the book concepts are presented in the context of an - gineering application requiring low jitter performance: the voltage controlled oscillator (VCO) used in a phase-locked loop (PLL). Techniques are presented for circuit-level design of low jitter delay elements for use in ring oscillators, as well as relating the circuit-level characteristics to system-level performance. Although the emphasis is on time-domain (jitter) measures of oscillator p- formance, a simple method of translating performance to frequency domain (phase noise) measures is presented as well. Structure of this Book This book is divided into nine chapters. The diagram on the following page shows the relationship between material in each chapter as well as placement in the system-level vs. circuit-level design hierarchy. Wherever possible, - perimental veri cation is presented in the same chapter as the corresponding theoretical development, rather than being isolated in a separate chapter.
1 273 kr
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The Designer's Guide to High-Purity Oscillators presents a comprehensive theory and design methodology for the design of LC CMOS oscillators used in every wireless transmission system. The authors introduce the subject of phase noise and oscillators from the very first principles, and carry the reader to a very intuitive circuit-driven theory of phase noise in LC oscillators. The theory presented includes both thermal and flicker noise effects. Based on Hegazi, Rael, and Abidi's mechanistic theory, a sensible design methodology is gradually developed. In addition, new topologies that were recently published by the authors are discussed in detail and an optimal design methodology is presented. While the book focuses on intuition, it rigorously proves every argument to present a compact yet accurate model for predicting phase noise in LC oscillators. By so doing, the design of an LC oscillator can be handled in the same manner as an amplifier design.
2 644 kr
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Engineering productivity in integrated circuit product design and - velopment today is limited largely by the effectiveness of the CAD tools used. For those domains of product design that are highly dependent on transistor-level circuit design and optimization, such as high-speed logic and memory, mixed-signal analog-digital int- faces, RF functions, power integrated circuits, and so forth, circuit simulation is perhaps the single most important tool. As the complexity and performance of integrated electronic systems has increased with scaling of technology feature size, the capabilities and sophistication of the underlying circuit simulation tools have correspondingly increased. The absolute size of circuits requiring transistor-level simulation has increased dramatically, creating not only problems of computing power resources but also problems of task organization, complexity management, output representation, initial condition setup, and so forth. Also, as circuits of more c- plexity and mixed types of functionality are attacked with simu- tion, the spread between time constants or event time scales within the circuit has tended to become wider, requiring new strategies in simulators to deal with large time constant spreads.
1 906 kr
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The Verilog Hardware Description Language (Verilog-HDL) has long been the most popular language for describing complex digital hardware. It started life as a prop- etary language but was donated by Cadence Design Systems to the design community to serve as the basis of an open standard. That standard was formalized in 1995 by the IEEE in standard 1364-1995. About that same time a group named Analog Verilog International formed with the intent of proposing extensions to Verilog to support analog and mixed-signal simulation. The first fruits of the labor of that group became available in 1996 when the language definition of Verilog-A was released. Verilog-A was not intended to work directly with Verilog-HDL. Rather it was a language with Similar syntax and related semantics that was intended to model analog systems and be compatible with SPICE-class circuit simulation engines. The first implementation of Verilog-A soon followed: a version from Cadence that ran on their Spectre circuit simulator. As more implementations of Verilog-A became available, the group defining the a- log and mixed-signal extensions to Verilog continued their work, releasing the defi- tion of Verilog-AMS in 2000. Verilog-AMS combines both Verilog-HDL and Verilog-A, and adds additional mixed-signal constructs, providing a hardware description language suitable for analog, digital, and mixed-signal systems. Again, Cadence was first to release an implementation of this new language, in a product named AMS Designer that combines their Verilog and Spectre simulation engines.