3D IC and RF SiPs: Advanced Stacking and Planar Solutions for 5G Mobility

Lih-Tyng Hwang, National Sun Yat-Sen University, Taiwan, obtained BS degree in Mechanical Engineering from National Tsing-Hua University, Hsinchu, Taiwan, earned PhD degree in Electrical and Systems Engineering from University of Pennsylvania, Philadelphia, Pennsylvania. He started his R&D career with MCNC (Microelectronics Center of North Carolina) in Research Triangle Park, North Carolina. In 1994, he continued his career with SPS (Semiconductor Products Sector), Motorola in Tempe, Arizona. He obtained an MBA degree from ASU while he was with SPS. In 2002, he transferred to Motorola Labs in Schaumburg, Illinois, where he actively worked with Motorola's Mobile division. He began his teaching career with National Sun Yat-Sen University, Kaohsiung, in August, 2009.Jason Tzyy-Sheng Horng, National Sun Yat-Sen University, Taiwan, received the B.S.E.E. degree from National Taiwan University, Taipei, Taiwan, in 1985, and the M.S.E.E. and Ph.D. degrees from the University of California at Los Angeles (UCLA), in 1990 and 1992, respectively. Since August 1992, he has been with the Department of Electrical Engineering, National Sun Yat-Sen University (NSYSU), Kaohsiung, Taiwan, where he was the Director of the Telecommunication Research and Development Center (2003 – 2008) and Director of the Institute of Communications Engineering (2004 – 2007), and where he is currently a Professor. He has authored or coauthored over 100 technical publications published in refereed journals and conferences proceedings. He holds over ten patents. His research interests include RF and microwave integrated circuits and components, RF signal integrity for wireless system-in-package, and digitally assisted RF technologies.

• 1 MM and MTM for Mobility 11.1 Convergence in Communications and the Future, 5G 31.1.1 From 1980 (1G) to 2010 (4G) 31.1.2 LTE-A and Rel 10 in 2010s 61.1.3 The Future: 5G and IoT (Targeting 2020) 81.2 Review of Key Products in Communication Networks 141.2.1 Wired Communications 141.2.2 Wireless Communications 211.3 MM and MTM, an Intro to Hardware Technology 311.3.1 Moore’s Law 311.3.2 More Than Moore 431.3.3 MTM Packaging Map and MM MTM Business Model 532 Interconnects 672.1 Hierarchy of Interconnection 692.1.1 On Chip (Level 0) Interconnections 692.1.2 Peripheral Pads on Semiconductor ICs (Level 0) 722.1.3 Al pads (Wirebond and Flip Chip) 732.1.4 Cu/Low K Re-Distribution Using Damascene Techniques (Flip Chip) 742.1.5 Au Pads (III–V) 772.1.6 Level 1 Interconnections: WB and FC—Why FC Interconnections are Preferred? 782.2 Level 1, Interconnection Gap in FC-PBGA, and Level 0.5 802.2.1 Wirebonds 802.2.2 Flip Chip Bumps with UBM 852.2.3 TSV and Microbumps, Cu or Au Stud Bumps (Level 0.5) 912.3 Changing Dynamics of Semiconductor Manufacturing 1002.3.1 Bumping Itself is a Business 1002.3.2 Cu/Low-K in BEOL 1022.3.3 Wafer Fab Foundry and OSAT are Competing for Their Business Shares 1023 State of the Art IC Packages, Modules, and Substrates 1113.1 Single-Chip Packages (SCPs): Standardized Packages 1133.1.1 Lead Frame Based: SO, QFP/QFN, and TAB 1143.1.2 Organic Interposer Based: BGA/CSP and LGA 1143.1.3 Known Good Bare Die 1203.1.4 Single-Chip Packaging Processes 1213.1.5 IC Testing 1233.2 Advanced IC Substrates and Assembly 1243.2.1 MLO Substrates for ICs 1263.2.2 Multi-Layered Organic (MLO) for IC Packages 1273.3 Customized Assemblies: MCP/MCMs and Modules 1303.3.1 Multi-Chip Module (MCM) or Multi-Chip Package (MCP) 1313.3.2 Modules 1324 Passives Technology 1394.1 Thick-Film Ceramic Technology (TFC) for MLC 1464.1.1 Green Tapes 1464.1.2 Thick-Film Fabrication 1494.1.3 LTCC EPs, Thick-Film IPD, and LTCC-Based RF Modules 1514.1.4 SMT (or SMD) 1554.2 MLO Passives by Laminate Organic (LO) 1564.2.1 MLO-Based RF Modules 1564.2.2 Laminates 1564.2.3 MLO Fabrication 1574.2.4 MLO EPs and RF Modules 1594.3 On-Chip Passives 1664.3.1 RF Isolation (BCM4330) 1664.3.2 Monolithic FEOL On-Chip Passives 1684.3.3 Rs, Ls, and Cs in BEOL Layers 1704.3.4 Goals 1724.4 Thin-Film Multilayer (TFM) and IPD 1734.5 Summary on Passives Fabrication Technologies: Solutions for RF-Passives Systems 1915 Electrical Design for 5G Hardware—Digital Focus 1995.1 Introduction to PCB 2015.2 Signal Transmission Techniques: Singled-Ended and Differential Signals 2025.2.1 Single-Ended and Differential 2025.3 Co-Design Examples 2165.3.1 Interconnection RF Models and Library 2165.3.2 Chip-Package and Chip-Package-Board Co-Designs 2195.4 Wide I/O Memory Using TSVs 2285.4.1 JEDEC Memory Standards 2305.4.2 Data Structure Using TSV-Based Wide I/O 2306 Electrical Design for 5G Hardware—RF Focus 2396.1 PHY, Modulated RF Carriers; a PoP Possible? 2406.1.1 Frequency Bands and Wave Propagation Characteristics 2406.1.2 Narrow-Band Process and CW Carrier for Digital Signals 2426.2 Antennas 2446.2.1 Two Often Encountered RF Passive Structures in Modern Portable Electronics: Antenna and Its Feed 2446.2.2 Types of Antennas: Linear, Microstrip-Patch, and Multi-Element Antenna 2456.2.3 Active-Integrated Antennas and Measurement of Antenna Performance 2516.3 RF Functional Components 2566.3.1 Bandpass Filters 2566.3.2 Baluns 2576.3.3 Switches and Duplexers 2626.4 EMI/EMC 2636.4.1 Sources of Interference 2646.4.2 Diagnostic and Regulations Conformation Techniques 2646.4.3 Containment Techniques 2677 Product, Process Development, and Control 2717.1 Business Processes 2727.1.1 Strategic Management (Product and Process Development) 2727.1.2 Design and Manufacturing; Outsourced or Not 2737.2 History of Statistical Approach for Quality Management 2737.2.1 Quality Guidelines and Standards 2747.2.2 Semiconductor Process Development and Characterization 2747.3 APQP—An Iterative Process for Product and Process Development 2757.3.1 Translate Product Ideas Into Processes 2757.4 FMEA, Control Plan, and Initial Process Study 2767.4.1 RPN 2767.4.2 Locating the Root Causes 2817.4.3 Pre-Launch Control Plan 2837.4.4 Initial Process Study 2847.5 PPAP and SPC 2877.5.1 PPAP 2877.5.2 SPC 2878 Product Life and Reliability Assessment 2918.1 Product Life Prediction 2928.1.1 Calculate MTTF from Processes and Theoretical Distributions 2938.1.2 Practices to Obtain the Expected Product Life 2968.1.3 Activation Energy 3008.2 Reliability Assessment 3018.2.1 Assessment Variables for Reliability Tests 3028.2.2 Reliability Assessment Practices 3038.2.3 Discussions on Weibull Analysis and Weibull Plotting 3099 Hardware Solutions for 5G Mobility 3179.1 5G Mobility Products and Planar Solutions 3189.1.1 High-Density and Logic Products 3199.1.2 RF-Passives Systems 3269.1.3 A Summary: WLP and LPP Used for Both HD&L and RF-Passives Products 3339.2 Advanced Interconnection and Future Business Model 3369.2.1 Advanced Interconnection 3369.2.2 New Business Model 3419.3 Finale—What’s Not 3439.3.1 New from Wafer Foundries 3439.3.2 System and Architectural Design of Mobile Handsets 3459.3.3 Thermo-Mechanical and Thermal Science 3499.3.4 Sensors and IoT 349A Failure Mechanisms and Failure Analysis 357A.1 Failure Mechanisms, or Macroscopic Models 358A.1.1 Silicon Oxide Breakdown 359A.1.2 Stress-Induced Migration (SM) 360A.1.3 Electro-Migration (EM) and Hillocks 360A.1.4 Spiking 362A.1.5 IMC, Purple plague (Gold-Al Intermetallics) 363A.1.6 Fatigue and Creeping 364A.1.7 Die Cracking 366A.1.8 Delamination and Popcorning 366A.1.9 Corrosion 367A.2 Failure Analysis (FA) Techniques and FA Tools 368A.2.1 De-Processing (or De-Capping) Techniques 368A.2.2 Microscopic and Analytical Tools 369B ANOVA 375B.1 One-Way ANOVA 376B.2 Two-Way ANOVA 377C Gauge R&R and DOE 381C.1 GR&R 381C.1.1 AIAG’s Xbar/Range Method for Gauge R&R Study 381C.1.2 Minitab 383C.1.3 GR&R Casted in the ANOVA Format 383C.1.4 Criteria 384C.2 DOE 384C.2.1 DOE Guidelines 385C.2.2 2k Runs, Unreplicated Case 386C.2.3 Fractional Factorial Designs, 2k-p Run, p = 1, 2,.., < k 399D Statistics Tables 409D.1 F Distribution 409 D.2 Poisson Table of Expected # of Occurrences at a Confidence Level (C.L.) 409D.3 MR Percentile Table 409