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Beskrivning
This book takes a tour through recent and prominent research works, touching upon new DRAM chip designs and technologies, near data processing approaches, new memory channel architectures, techniques to tolerate the overheads of refresh and fault tolerance, security attacks and mitigations, and memory scheduling.
Rajeev Balasubramonian is a Professor at the School of Computing, University of Utah. He received his B.Tech. in Computer Science and Engineering from the Indian Institute of Technology, Bombay in 1998. He received his M.S. (2000)and Ph.D. (2003) from the University of Rochester. His primary research interests include memory systems, security, and application-specific architectures. Prof. Balasubramonian is a recipient of an NSF CAREER award, faculty research awards from IBM, Google, HPE, an Intel Outstanding Research Award, and various teaching awards at the University of Utah. He has co-authored papers that have been selected as IEEE Micro Top Picks (2007 and 2010) and that have received three best paper awards.
Innehållsförteckning
List of Figures.- List of Tables.- Preface.- Acknowledgments.- Introduction.- Memory System Basics for Every Architect.- Commercial Memory Products.- Memory Scheduling.- Data Placement.- Memory Chip Microarchitectures.- Memory Channels.- Memory Reliability.- Memory Refresh.- Near Data Processing.- Memory Security.- Closing Thoughts.- Bibliography.- Author's Biography.