MOSTAFA ABD-EL-BARR, PhD, is currently a professor and chairman of the Department of Information Science at Kuwait University. He has co-authored two other books, published more than 120 papers, and served as chair for a number of international conferences and symposia. HESHAM EL-REWINI, PhD, PE, is a full professor and chairman of the Department of Computer Sciences and Engineering at Southern Methodist University (SMU). He has co-authored several books, published numerous research papers in journals and conference proceedings, and chaired many international conferences.

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• Fundamentals of Computer Organization and ArchitecturePreface xi1. Introduction to Computer Systems 11.1. Historical Background 21.2. Architectural Development and Styles 41.3. Technological Development 51.4. Performance Measures 61.5. Summary 112. Instruction Set Architecture and Design 152.1. Memory Locations and Operations 152.2. Addressing Modes 182.3. Instruction Types 262.4. Programming Examples 312.5. Summary 333. Assembly Language Programming 373.1. A Simple Machine 383.2. Instructions Mnemonics and Syntax 403.3. Assembler Directives and Commands 433.4. Assembly and Execution of Programs 443.5. Example: The X86 Family 473.6. Summary 554. Computer Arithmetic 594.1. Number Systems 594.2. Integer Arithmetic 634.3. Floating-Point Arithmetic 744.4. Summary 795. Processing Unit Design 835.1. CPU Basics 835.2. Register Set 855.3. Datapath 895.4. CPU Instruction Cycle 915.5. Control Unit 955.6. Summary 1046. Memory System Design I 1076.1. Basic Concepts 1076.2. Cache Memory 1096.3. Summary 1307. Memory System Design II 1357.1.Main Memory 1357.2. Virtual Memory 1427.3. Read-Only Memory 1567.4. Summary 1588. Input–Output Design and Organization 1618.1. Basic Concepts 1628.2. Programmed I/O 1648.3. Interrupt-Driven I/O 1678.4. Direct Memory Access (DMA) 1758.5. Buses 1778.6. Input–Output Interfaces 1818.7. Summary 1829 Pipelining Design Techniques 1859.1. General Concepts 1859.2. Instruction Pipeline 1879.3. Example Pipeline Processors 2019.4. Instruction-Level Parallelism 2079.5. Arithmetic Pipeline 2099.6. Summary 21310 Reduced Instruction Set Computers (RISCs) 21510.1. RISC/CISC Evolution Cycle 21710.2. RISCs Design Principles 21810.3. Overlapped Register Windows 22010.4. RISCs Versus CISCs 22110.5. Pioneer (University) RISC Machines 22310.6. Example of Advanced RISC Machines 22710.7. Summary 23211 Introduction to Multiprocessors 23511.1. Introduction 23511.2. Classification of Computer Architectures 23611.3. SIMD Schemes 24411.4. MIMD Schemes 24611.5. Interconnection Networks 25211.6. Analysis and Performance Metrics 25411.7. Summary 254Exercises 255References and Further Reading 256Index 259Advanced Computer Architecture and Parallel Processing1. Introduction to Advanced Computer Architecture and Parallel Processing 11.1 Four Decades of Computing 21.2 Flynn's Taxonomy of Computer Architecture 41.3 SIMD Architecture 51.4 MIMD Architecture 61.5 Interconnection Networks 111.6 Chapter Summary 152. Multiprocessors Interconnection Networks 192.1 Interconnection Networks Taxonomy 192.2 Bus-Based Dynamic Interconnection Networks 202.3 Switch-Based Interconnection Networks 242.4 Static Interconnection Networks 332.5 Analysis and Performance Metrics 412.6 Chapter Summary 453. Performance Analysis of Multiprocessor Architecture 513.1 Computational Models 513.2 An Argument for Parallel Architectures 553.3 Interconnection Networks Performance Issues 583.4 Scalability of Parallel Architectures 633.5 Benchmark Performance 673.6 Chapter Summary 724. Shared Memory Architecture 774.1 Classification of Shared Memory Systems 784.2 Bus-Based Symmetric Multiprocessors 804.3 Basic Cache Coherency Methods 814.4 Snooping Protocols 834.5 Directory Based Protocols 894.6 Shared Memory Programming 964.7 Chapter Summary 995. Message Passing Architecture 1035.1 Introduction to Message Passing 1035.2 Routing in Message Passing Networks 1055.3 Switching Mechanisms in Message Passing 1095.4 Message Passing Programming Models 1145.5 Processor Support for Message Passing 1175.6 Example Message Passing Architectures 1185.7 Message Passing Versus Shared Memory Architectures 1225.8 Chapter Summary 1236. Abstract Models 1276.1 The PRAM Model and Its Variations 1276.2 Simulating Multiple Accesses on an EREW PRAM 1296.3 Analysis of Parallel Algorithms 1316.4 Computing Sum and All Sums 1336.5 Matrix Multiplication 1366.6 Sorting 1396.7 Message Passing Model 1406.8 Leader Election Problem 1466.9 Leader Election in Synchronous Rings 1476.10 Chapter Summary 1547. Network Computing 1577.1 Computer Networks Basics 1587.2 Client/Server Systems 1617.3 Clusters 1667.4 Interconnection Networks 1707.5 Cluster Examples 1757.6 Grid Computing 1777.7 Chapter Summary 1788. Parallel Programming in the Parallel Virtual Machine 1818.1 PVM Environment and Application Structure 1818.2 Task Creation 1858.3 Task Groups 1888.4 Communication Among Tasks 1908.5 Task Synchronization 1968.6 Reduction Operations 1988.7 Work Assignment 2008.8 Chapter Summary 2019. Message Passing Interface (MPI) 2059.1 Communicators 2059.2 Virtual Topologies 2099.3 Task Communication 2139.4 Synchronization 2179.5 Collective Operations 2209.6 Task Creation 2259.7 One-Sided Communication 2289.8 Chapter Summary 23110 Scheduling and Task Allocation 23510.1 The Scheduling Problem 23510.2 Scheduling DAGs without Considering Communication 23810.3 Communication Models 24210.4 Scheduling DAGs with Communication 24410.5 The NP-Completeness of the Scheduling Problem 24810.6 Heuristic Algorithms 25010.7 Task Allocation 25610.8 Scheduling in Heterogeneous Environments 262Problems 263References 264Index 267