"Introduces a theory of random testing in digital circuits for the first time and offers practical guidance for the implementation of random pattern generators, signature analyzers design for random testability, and testing results. Contains several new and unpublished results. "
Rene David is a Research Director at the Centre National de la recherche Scientififique working at the Instuit National Polytechnique de Grenoble, France.
Recensioner i media
"This book is based on the author's work in the area of random pattern testing. . .It is well based in mathematics, which is very refreshing to read. . .With the analytical tools developed in this book you will be taken through the frontier of random pattern testing from the very fundamentals right up to very useful concepts, which can be applied in today's design to many very useful techniques. "---T.W. Williams, University of Hannover and IBM, Hannover, Germany". . .Rene David presents a broad spectrum of topics on random testing of digital circuits at a level accessible to undergraduate students, and yet challenging for advanced graduate students and engineers working in industry. The book is well written, readable, reliable and accurate. It is a gem. It should be on the shelf (and not only there!) of all professionals dealing with digital testing."---Test Technology Newsletter of the IEEE Computer Society". . .David's book will be valuable (especially graduate) students because it is clearly written and well structured, and includes recent scientific results. It will also serve as a reference book for experts because it summarizes work that is scattered among the journals and conference proceedings."---Interfaces
Innehållsförteckning
Random testing and built-in self-test; models for digital circuits and fault models; basic concepts and test generation methods; performance measurements for a test sequence; basic principles of random testing; random test length for combinational circuits; random test length for sequential circuits; random test length for RAMs; random test length for microprocessors; generation of random test sequences; experimental results; signature analysis; design for random testability; appendices - A - random pattern sources, B - calculation of a probability of complete fault coverage, C - finite Markov chains, D - black-box fault model, E - exact calculation of activities, F - comparing asynchronous and synchronous test, G - proofs of properties 7.1, 7.2 and 12.3, H - microprocessor Motorola 6800, I - pseudorandom testing, J - random testing of delay faults, K - subsequences of required lengths, L - diagnosis from random testing, M - conjecture about multiple faults; exercises; solutions to exercises.
