Dr. Chao Wang is a Professor with the University of Science and Technology of China, and also the Vice Dean of the School of Software Engineering. He serves as the Associate Editor of ACM TODAES and IEEE/ACM TCBB. Dr. Wang was the recipient of ACM China Rising Star Honorable Mention, and best IP nomination of DATE 2015, Best Paper Candidate of CODES+ISSS 2018. He is a senior member of ACM, senior member of IEEE, and distinguished member of CCF.

• Preface. 1 Overview of Domain‑Specific Computing. 2 Machine Learning Algorithms and Hardware Accelerator Customization. 3 Hardware Accelerator Customization for Data Mining Recommendation Algorithms. 4 Customization and Optimization of Distributed Computing Systems for Recommendation Algorithms. 5 Hardware Customization for Clustering Algorithms. 6 Hardware Accelerator Customization Techniques for Graph Algorithms. 7 Overview of Hardware Acceleration Methods for Neural Network Algorithms. 8 Customization of FPGA‑Based Hardware Accelerators for Deep Belief Networks. 9 FPGA‑Based Hardware Accelerator Customization for Recurrent Neural Networks. 10 Hardware Customization/Acceleration Techniques for Impulse Neural Networks. 11 Accelerators for Big Data Genome Sequencing. 12 RISC‑V Open Source Instruction Set and Architecture. 13 Compilation Optimization Methods in the Customization of Reconfigurable Accelerators Index.

Dr. Chao Wang is a Professor with the University of Science and Technology of China, and also the Vice Dean of the School of Software Engineering. He serves as the Associate Editor of ACM TODAES and IEEE/ACM TCBB. Dr. Wang was the recipient of ACM China Rising Star Honorable Mention, and best IP nomination of DATE 2015, Best Paper Candidate of CODES+ISSS 2018. He is a senior member of ACM, senior member of IEEE, and distinguished member of CCF.

• Preface. 1 Overview of Domain‑Specific Computing. 2 Machine Learning Algorithms and Hardware Accelerator Customization. 3 Hardware Accelerator Customization for Data Mining Recommendation Algorithms. 4 Customization and Optimization of Distributed Computing Systems for Recommendation Algorithms. 5 Hardware Customization for Clustering Algorithms. 6 Hardware Accelerator Customization Techniques for Graph Algorithms. 7 Overview of Hardware Acceleration Methods for Neural Network Algorithms. 8 Customization of FPGA‑Based Hardware Accelerators for Deep Belief Networks. 9 FPGA‑Based Hardware Accelerator Customization for Recurrent Neural Networks. 10 Hardware Customization/Acceleration Techniques for Impulse Neural Networks. 11 Accelerators for Big Data Genome Sequencing. 12 RISC‑V Open Source Instruction Set and Architecture. 13 Compilation Optimization Methods in the Customization of Reconfigurable Accelerators Index.