Alex Lidow, Ph.D., is CEO of Efficient Power Conversion Corporation (EPC), USA. Michael de Rooij, Ph.D., is Vice President of Applications Engineering at EPC Corporation, USA. Johan Strydom, Ph.D., is Advanced Development Manager, Kilby Labs, Texas Instruments, USA. David Reusch, Ph.D., is Principal Scientist, VPT, Inc., USA. John Glaser is Director, Applications Engineering, EPC Corporation, USA.

• Foreword xvAcknowledgments xvii1 GaN Technology Overview 11.1 Silicon Power Metal Oxide Silicon Field Effect Transistors 1976–2010 11.2 The Gallium Nitride Journey Begins 21.3 GaN and SiC Compared with Silicon 21.3.1 Bandgap (Eg) 31.3.2 Critical Field (Ecrit) 31.3.3 On‐Resistance (RDS(on)) 41.3.4 The Two‐Dimensional Electron Gas (2DEG) 41.4 The Basic GaN Transistor Structure 61.4.1 Recessed Gate Enhancement‐Mode Structure 71.4.2 Implanted Gate Enhancement‐Mode Structure 81.4.3 pGaN Gate Enhancement‐Mode Structure 81.4.4 Hybrid Normally Off Structures 81.4.5 Reverse Conduction in HEMT Transistors 101.5 Building a GaN Transistor 111.5.1 Substrate Material Selection 111.5.2 Growing the Heteroepitaxy 121.5.3 Processing the Wafer 121.5.4 Making Electrical Connection to the Outside World 131.6 GaN Integrated Circuits 151.7 Summary 21References 212 GaN Transistor Electrical Characteristics 252.1 Introduction 252.2 Device Ratings 252.2.1 Drain‐Source Voltage 252.3 On‐Resistance (RDS(on)) 302.4 Threshold Voltage 332.5 Capacitance and Charge 342.6 Reverse Conduction 372.7 Summary 39References 403 Driving GaN Transistors 413.1 Introduction 413.2 Gate Drive Voltage 443.3 Gate Drive Resistance 453.4 Capacitive Current‐Mode Gate Drive Circuits for Gate Injection Transistors 463.5 dv/dt Considerations 483.5.1 Controlling dv/dt at Turn‐On 483.5.2 Complementary Device Turn‐On 493.6 di/dt Considerations 513.6.1 Device Turn‐On and Common‐Source Inductance 513.6.2 Off‐State Device di/dt 533.7 Bootstrapping and Floating Supplies 543.8 Transient Immunity 573.9 High‐Frequency Considerations 593.10 Gate Drivers for Enhancement‐Mode GaN Transistors 603.11 Cascode, Direct‐Drive, and Higher‐Voltage Configurations 603.11.1 Cascode Devices 603.11.2 Direct‐Drive Devices 633.11.3 Higher‐Voltage Configurations 643.12 Summary 64References 654 Layout Considerations for GaN Transistor Circuits 694.1 Introduction 694.2 Minimizing Parasitic Inductance 694.3 Conventional Power‐Loop Designs 724.3.1 Lateral Power‐Loop Design 724.3.2 Vertical Power‐Loop Design 734.4 Optimizing the Power Loop 744.4.1 Impact of Integration on Parasitics 754.5 Paralleling GaN Transistors 764.5.1 Paralleling GaN Transistors for a Single Switch 764.5.2 Paralleling GaN Transistors for Half‐Bridge Applications 794.6 Summary 83References 835 Modeling and Measurement of GaN Transistors 855.1 Introduction 855.2 Electrical Modeling 855.2.1 Basic Modeling 855.2.2 Limitations of Basic Modeling 885.2.3 Limitations of Circuit Simulation 905.3 Measuring GaN Transistor Performance 915.3.1 Voltage Measurement Requirements 945.3.2 Probing and Measurement Techniques 965.3.3 Measuring Non‐Ground‐Referenced Signals 995.3.4 Current Measurement Requirement 1005.4 Summary 101References 1026 Thermal Management 1056.1 Introduction 1056.2 Thermal Equivalent Circuits 1056.2.1 Thermal Resistances in a Lead Frame Package 1056.2.2 Thermal Resistances in a Chip‐Scale Package 1076.2.3 Junction‐to‐Ambient Thermal Resistance 1086.2.4 Transient Thermal Impedance 1096.3 Improving Thermal Performance with a Heatsink 1106.3.1 Selection of Heatsink and Thermal Interface Material (TIM) 1116.3.2 Heatsink Attachment for Bottom‐Side Cooling 1126.3.3 Heatsink Attachment for Multisided Cooling 1136.4 System‐Level Thermal Analysis 1146.4.1 Thermal Model of a Power Stage with Discrete GaN Transistors 1156.4.2 Thermal Model of a Power Stage with a Monolithic GaN Integrated Circuit 1176.4.3 Thermal Model of a Multiphase System 1186.4.4 Temperature Measurement 1206.4.4.1 Optical 1206.4.4.2 Physical Contact 1216.4.4.3 Temperature‐Sensitive Electrical Parameter 1226.4.5 Experimental Characterization 1226.4.6 Application Examples 1246.5 Summary 128References 1287 Hard‐Switching Topologies 1317.1 Introduction 1317.2 Hard‐Switching Loss Analysis 1317.2.1 Hard‐Switching Transitions with GaN Transistors 1327.2.2 Output Capacitance (COSS) Losses 1357.2.3 Turn‐On Overlap Loss 1387.2.3.1 Current Rise Time 1397.2.3.2 Voltage Fall Time 1427.2.4 Turn‐Off Overlap Losses 1457.2.4.1 Current Fall Time 1467.2.4.2 Voltage Rise Time 1477.2.5 Gate‐Charge (QG) Losses 1477.2.6 Reverse Conduction Losses (PSD) 1477.2.6.1 Impact of Dead Time Selection on Reverse Conduction Loss 1477.2.6.2 Adding an Anti‐Parallel Schottky Diode 1507.2.6.3 Dynamic COSS‐Related Reverse Conduction Losses 1537.2.7 Reverse Recovery (QRR) Losses 1537.2.8 Hard‐Switching Figure of Merit 1547.3 Impact of Parasitic Inductance on Hard‐Switching Losses 1547.3.1 Impact of Common‐Source Inductance (LCS) 1547.3.2 Impact of Power‐Loop Inductance on Device Losses 1577.4 Frequency Impact on Magnetics 1607.4.1 Transformers 1607.4.2 Inductors 1617.5 Buck Converter Example 1627.5.1 Comparison with Experimental Measurements 1697.5.2 Consideration of Parasitic Inductance 1707.6 Summary 174References 1748 Resonant and Soft‐Switching Converters 1778.1 Introduction 1778.2 Resonant and Soft‐Switching Techniques 1778.2.1 Zero‐Voltage and Zero‐Current Switching 1778.2.2 Resonant DC–DC Converters 1798.2.3 Resonant Network Combinations 1798.2.4 Resonant Network Operating Principles 1808.2.5 Resonant Switching Cells 1818.2.6 Soft‐Switching DC–DC Converters 1828.3 Key Device Parameters for Resonant and Soft‐Switching Applications 1828.3.1 Output Charge (QOSS) 1828.3.2 Determining Output Charge from Manufacturers’ Datasheets 1838.3.3 Comparing Output Charge of GaN Transistors and Si MOSFETs 1848.3.4 Gate Charge (QG) 1858.3.5 Determining Gate Charge for Resonant and Soft‐Switching Applications 1868.3.6 Comparing Gate Charge of GaN Transistors and Si MOSFETs 1878.3.7 Comparing Performance Metrics of GaN Transistors and Si MOSFETs 1878.4 High‐Frequency Resonant Bus Converter Example 1888.4.1 Resonant GaN and Si Bus Converter Designs 1918.4.2 GaN and Si Device Comparison 1918.4.3 Zero‐Voltage Switching Transition 1938.4.4 Efficiency and Power Loss Comparison 1958.4.5 Impact of Further Device Improvements on Performance 1978.5 Summary 199References 1999 RF Performance 2019.1 Introduction 2019.2 Differences Between RF and Switching Transistors 2029.3 RF Basics 2049.4 RF Transistor Metrics 2059.4.1 Determining the High‐Frequency Characteristics of RF Transistors 2069.4.2 Pulse Testing for Thermal Considerations 2079.4.3 Analyzing the s‐Parameters 2099.4.3.1 Test for Stability 2099.4.3.2 Transistor Input and Output Reflection 2109.4.3.3 Transducer Gain 2119.4.3.4 Unilateral/Bilateral Transistor Test 2119.5 Amplifier Design Using Small‐Signal s‐Parameters 2129.5.1 Conditionally Stable Bilateral Transistor Amplifier Design 2139.5.1.1 Available Gain 2139.5.1.2 Constant Available Gain Circles 2139.6 Amplifier Design Example 2149.6.1 Matching and Bias Tee Network Design 2169.6.2 Experimental Verification 2199.7 Summary 221References 22110 DC–DC Power Conversion 22310.1 Introduction 22310.2 Non‐Isolated DC–DC Converters 22310.2.1 The 12 VIN–1.2 VOUT Buck Converter with Discrete Devices 22410.2.2 The 12 VIN–1 VOUT Monolithic Half‐Bridge IC‐Based Point‐of‐Load Module 22810.2.3 Very‐High‐Frequency 12 VIN Monolithic Half‐Bridge IC‐Based Point‐of‐Load Module 23010.2.4 The 28 VIN–3.3 VOUT Point‐of‐Load Module 23310.2.5 The 48 VIN–12 VOUT Buck Converter with Parallel GaN Transistors for High‐Current Applications 23310.3 Transformer‐Based DC–DC Converters 23910.3.1 Eighth‐Brick Converter Example 23910.3.2 High‐Performance 48 V Step‐Down LLC DC Transformer 24310.3.2.1 Circuit Overview 24310.3.2.2 GaN Transistor Advantage in the LLC Converter 24410.3.2.3 A 1 MHz, 900 W, 48 V–12 V LLC Example Using GaN Transistors 24510.3.2.4 A 1 MHz, 900 W, 48 V–6 V LLC Example Using GaN Transistors 24810.4 Summary 249References 25011 Multilevel Converters 25111.1 Introduction 25111.2 Benefits of Multilevel Converters 25111.2.1 Applying Multilevel Converters to 48 V Applications 25211.2.2 Multilevel Converters for High‐Voltage (400 V) Applications 25411.3 Gate Driver Implementation 25511.4 Bootstrap Power Supply Solutions for GaN Transistors 25611.5 Multilevel Converters for PFC Applications 26111.6 Experimental Examples 26311.6.1 Low Voltage 26311.6.2 High Voltage 26411.7 Summary 264References 26512 Class D Audio Amplifiers 26912.1 Introduction 26912.1.1 Total Harmonic Distortion 27112.1.2 Intermodulation Distortion 27212.2 GaN Transistor Class D Audio Amplifier Example 27312.2.1 Closed‐Loop Amplifier 27412.2.2 Open‐Loop Amplifier 27612.3 Summary 278References 27813 Lidar 28113.1 Introduction to Light Detection and Ranging (Lidar) 28113.2 Pulsed Laser Driver Overview 28113.2.1 Pulse Requirements 28213.2.2 Semiconductor Optical Sources 28413.2.3 Basic Driver Circuits 28513.2.4 Driver Switch Properties 28613.3 Basic Design Process 28813.3.1 Resonant Capacitive Discharge Laser Driver Design 28813.3.2 Quantitative Effect of Stray Inductance 28913.4 Hardware Driver Design 29013.5 Experimental Results 29113.5.1 High‐Speed Laser Driver Design Example 29113.5.2 Fastest 29213.5.3 Highest Current 29313.5.4 Low Voltage 29313.6 Other Considerations 29413.6.1 Resonant Capacitors 29413.6.2 Charging 29513.6.3 Voltage Probing 29513.6.4 Current Sensing 29613.6.5 Dual‐Edge Control 29713.7 Summary 299References 29914 Envelope Tracking 30114.1 Introduction 30114.2 High‐Frequency GaN Transistors 30214.3 Topologies for Envelope Tracking Supplies 30414.3.1 Multiphase Converter 30514.3.2 Multilevel Converter 30614.4 Gate Driver Design 30714.5 Design Example: Tracking a 20 MHz LTE Envelope Signal 30814.6 Summary 311References 31115 Highly Resonant Wireless Power 31515.1 Introduction 31515.2 Overview of a Wireless Power System 31615.3 Amplifiers for Wireless Power Systems 32015.3.1 The Class E Amplifier 32015.3.2 ZVS Class D Amplifier 32115.4 Transistors Suitable for Wireless Power Amplifiers 32215.4.1 Figure of Merit for Wireless Power Amplifier Topologies 32215.4.2 GaN Transistors Evaluation in Wireless Power Applications 32315.5 Experimental Validation of GaN Transistor‐Based Wireless Power Amplifiers 32515.5.1 Differential‐Mode Class E Amplifier Example 32515.5.2 Differential‐Mode ZVS Class D Amplifier Example 33015.6 Summary 334References 33416 GaN Transistors for Space Applications 33716.1 Introduction 33716.2 Failure Mechanisms 33716.3 Standards for Radiation Exposure and Tolerance 33816.4 Gamma Radiation Tolerance 33816.5 SEE Testing 34016.6 Neutron Radiation (Displacement Damage) 34116.7 Performance Comparison Between GaN Transistors and Rad‐Hard Si MOSFETs 34316.8 Summary 344References 34517 Replacing Silicon Power MOSFETs 34717.1 Introduction: What Controls the Rate of Adoption? 34717.2 New Capabilities Enabled by GaN Transistors 34717.3 GaN Transistors are Easy to Use 34917.4 Cost Versus Time 35017.4.1 Starting Material 35117.4.2 Epitaxial Growth 35117.4.3 Wafer Fabrication 35117.4.4 Test and Assembly 35217.5 GaN Transistors are Reliable 35217.6 Future Direction of GaN Transistors 35217.7 Summary 353References 354Appendix 355Index 361