Majid Pakdel, PhD is affiliated with the Department of Electrical Engineering at the University of Zanjan. He has authored five books and over 50 publications in internationally reputed journals and conferences. His research interests include power electronics, artificial intelligence, microcontroller programming, and power system protection.

• Preface ix1 Averaged-Switch Modeling and Simulation 11.1 Introductory Example (Synchronous Buck Converter) 11.2 Synchronous Buck Converter State Equations 41.3 Synchronous Buck Converter Averaging and Dynamic Modeling 71.4 Point of Load Application Example 111.5 Synchronous Buck Example Control-to-Output Transfer Function 121.6 Evaluating Frequency Responses Using MATLAB and Python 151.7 Review of Closed Loop Control Principles 191.8 Review of Feedback Loop Design Principles 231.9 Design Example Synchronous Buck POL Voltage Regulator 271.10 Introduction to LTspice Simulations 391.11 LTspice Simulation Example 411.12 LTspice Simulation Example Discussion 471.13 The PSIM and MATLAB Simulation Example 491.14 The Main Result 571.15 Derivation Part 1 621.16 Null-Double Injection 661.17 Derivation Part 2 681.18 Introduction 721.19 Solution Using the Feedback Theorem 741.20 Discussion 821.21 Introduction to Closed-Loop Voltage Regulator 881.22 Output Impedance 911.23 Summary 961.24 Introduction to Circuit Averaging and Averaged Switch Modelingm 971.25 Converter Analysis Using Averaged Switch Models 1051.26 Simulations Using Averaged Switch Models 1101.27 Design Verification 1211.28 Including Losses in Averaged Switch Models 1301.29 Alternative Averaged Switch Networks 1371.30 Averaged Switch Modeling in DCM 1391.31 Combined CCM/DCM Averaged Switch Model 1461.32 Library of Spice Averaged Switch Models 1541.33 Loop Gain Simulation in CCM/DCM 1571.34 Small-Signal AC Modeling of DCM Converters 1631.35 DCM Converter Transfer Functions 169References 1702 Techniques of Design-Oriented Analysis 1712.1 Introduction to Extra Element Theorem 1712.2 EET Questions and Answers 1742.3 EET Derivation 1752.4 Practical Applications of EET 1802.5 EET Application-Effect of Capacitor ESR 1822.6 Graphical Comparison of Impedances 1862.7 Analysis of SEPIC Frequency Responses Using@EET 1902.8 SEPIC Example ZN 1952.9 SEPIC Example ZD 1992.10 Derivation of ZD Using EET 2012.11 SEPIC Example Undamped Frequency Response 2042.12 SEPIC Example Impedance Interactions 2082.13 Practical Design of Damping 2142.14 Introduction to n-Extra Element Theorem (nEET) 2212.15 nEET Application Example, Two-Section Filter 2282.16 nEET Discussion 2422.17 nEET Application Example, Damped Filter Transfer Function 2422.18 nEET Frequency Inversion 2552.19 nEET Application Example, Output Impedance 2582.20 nEET Summary 262References 2633 Input Filter Design 2653.1 Introduction to Electromagnetic Compatibility (EMC) and Interference (EMI) 2653.2 Differential and Common-Mode EMI 2703.3 EMI Measurement and Simulation Example 2723.4 Addition of Input Filter to a Converter 2863.5 Impedance Interactions 2893.6 Approaches to Input Filter Design 2943.7 Overview of MATLAB and Spice Examples 2983.8 Control to Output Transfer Function with Input Filter 3063.9 Determination of ZD and ZN 3083.10 Input Filter Design Criteria 3113.11 Corner Frequencies 3163.12 Introduction to Input Filter Damping 3173.13 Parallel RC Damping 3193.14 Damping Networks 3243.15 Optimum Damping 3253.16 Optimum Damping Summary of Results 3323.17 Multi-Stage Cascaded Filters 3373.18 Cascaded Filter Design Example 3403.19 Input Filter Design Summary 350References 3514 Current Mode Control 3534.1 Introduction to Peak Current Mode Control 3534.2 Simple Approximate Model 3614.3 Small-Signal Model Based on Simple Approximation 3674.4 Synchronous Buck POL Converter Design Example 3734.5 Oscillation for D > 0.5 3844.6 Stabilization with Addition of an Artificial Ramp 3924.7 Revisited Inclusion of Artificial Ramp Design Example 3994.8 More Accurate Average Model 4034.9 Average Spice CPM Sub-Circuit 4084.10 Design Verification Using Average Circuit Simulations 4164.11 Small-Signal AC Equivalent Circuit Models 4274.12 Transfer Functions of CPM Controlled Converters 4324.13 The CPM Controlled Boost Converter Analysis Example 4434.14 Comparison of Frequency Responses of Duty-Cycle and Current-Mode Controlled Converters 4544.15 Motivation for Modeling of High Frequency Effects 4584.16 Pulse Width Modulator as a Sampler 4624.17 Overview of Sampled Data Systems 4644.18 Sampled Data Modeling of Switching Converters 4754.19 Introduction to Sampled Data Modeling of PCM Controlled Converters 4774.20 Development of Sampled Data Model 4804.21 Frequency Responses of Sampled Data Models 4864.22 The First-Order Approximation 4894.23 The Second-Order Approximation 4944.24 Summary and Conclusions 4984.25 Introduction to Average Current Mode Control 4994.26 Transfer Functions of Average Current Mode Controlled Converters 5044.27 The ACM Controlled Boost DC-DC Converter Design Example 5074.28 Design Verification by Average Circuit Simulations 5184.29 Design of the Voltage Control Loop 5244.30 The ACM Controlled Boost DC Voltage Regulator Design 528References 538Index 539

Majid Pakdel, PhD is affiliated with the Department of Electrical Engineering at the University of Zanjan. He has authored five books and over 50 publications in internationally reputed journals and conferences. His research interests include power electronics, artificial intelligence, microcontroller programming, and power system protection.

• Preface ix1 Averaged-Switch Modeling and Simulation 11.1 Introductory Example (Synchronous Buck Converter) 11.2 Synchronous Buck Converter State Equations 41.3 Synchronous Buck Converter Averaging and Dynamic Modeling 71.4 Point of Load Application Example 111.5 Synchronous Buck Example Control-to-Output Transfer Function 121.6 Evaluating Frequency Responses Using MATLAB and Python 151.7 Review of Closed Loop Control Principles 191.8 Review of Feedback Loop Design Principles 231.9 Design Example Synchronous Buck POL Voltage Regulator 271.10 Introduction to LTspice Simulations 391.11 LTspice Simulation Example 411.12 LTspice Simulation Example Discussion 471.13 The PSIM and MATLAB Simulation Example 491.14 The Main Result 571.15 Derivation Part 1 621.16 Null-Double Injection 661.17 Derivation Part 2 681.18 Introduction 721.19 Solution Using the Feedback Theorem 741.20 Discussion 821.21 Introduction to Closed-Loop Voltage Regulator 881.22 Output Impedance 911.23 Summary 961.24 Introduction to Circuit Averaging and Averaged Switch Modelingm 971.25 Converter Analysis Using Averaged Switch Models 1051.26 Simulations Using Averaged Switch Models 1101.27 Design Verification 1211.28 Including Losses in Averaged Switch Models 1301.29 Alternative Averaged Switch Networks 1371.30 Averaged Switch Modeling in DCM 1391.31 Combined CCM/DCM Averaged Switch Model 1461.32 Library of Spice Averaged Switch Models 1541.33 Loop Gain Simulation in CCM/DCM 1571.34 Small-Signal AC Modeling of DCM Converters 1631.35 DCM Converter Transfer Functions 169References 1702 Techniques of Design-Oriented Analysis 1712.1 Introduction to Extra Element Theorem 1712.2 EET Questions and Answers 1742.3 EET Derivation 1752.4 Practical Applications of EET 1802.5 EET Application-Effect of Capacitor ESR 1822.6 Graphical Comparison of Impedances 1862.7 Analysis of SEPIC Frequency Responses Using@EET 1902.8 SEPIC Example ZN 1952.9 SEPIC Example ZD 1992.10 Derivation of ZD Using EET 2012.11 SEPIC Example Undamped Frequency Response 2042.12 SEPIC Example Impedance Interactions 2082.13 Practical Design of Damping 2142.14 Introduction to n-Extra Element Theorem (nEET) 2212.15 nEET Application Example, Two-Section Filter 2282.16 nEET Discussion 2422.17 nEET Application Example, Damped Filter Transfer Function 2422.18 nEET Frequency Inversion 2552.19 nEET Application Example, Output Impedance 2582.20 nEET Summary 262References 2633 Input Filter Design 2653.1 Introduction to Electromagnetic Compatibility (EMC) and Interference (EMI) 2653.2 Differential and Common-Mode EMI 2703.3 EMI Measurement and Simulation Example 2723.4 Addition of Input Filter to a Converter 2863.5 Impedance Interactions 2893.6 Approaches to Input Filter Design 2943.7 Overview of MATLAB and Spice Examples 2983.8 Control to Output Transfer Function with Input Filter 3063.9 Determination of ZD and ZN 3083.10 Input Filter Design Criteria 3113.11 Corner Frequencies 3163.12 Introduction to Input Filter Damping 3173.13 Parallel RC Damping 3193.14 Damping Networks 3243.15 Optimum Damping 3253.16 Optimum Damping Summary of Results 3323.17 Multi-Stage Cascaded Filters 3373.18 Cascaded Filter Design Example 3403.19 Input Filter Design Summary 350References 3514 Current Mode Control 3534.1 Introduction to Peak Current Mode Control 3534.2 Simple Approximate Model 3614.3 Small-Signal Model Based on Simple Approximation 3674.4 Synchronous Buck POL Converter Design Example 3734.5 Oscillation for D > 0.5 3844.6 Stabilization with Addition of an Artificial Ramp 3924.7 Revisited Inclusion of Artificial Ramp Design Example 3994.8 More Accurate Average Model 4034.9 Average Spice CPM Sub-Circuit 4084.10 Design Verification Using Average Circuit Simulations 4164.11 Small-Signal AC Equivalent Circuit Models 4274.12 Transfer Functions of CPM Controlled Converters 4324.13 The CPM Controlled Boost Converter Analysis Example 4434.14 Comparison of Frequency Responses of Duty-Cycle and Current-Mode Controlled Converters 4544.15 Motivation for Modeling of High Frequency Effects 4584.16 Pulse Width Modulator as a Sampler 4624.17 Overview of Sampled Data Systems 4644.18 Sampled Data Modeling of Switching Converters 4754.19 Introduction to Sampled Data Modeling of PCM Controlled Converters 4774.20 Development of Sampled Data Model 4804.21 Frequency Responses of Sampled Data Models 4864.22 The First-Order Approximation 4894.23 The Second-Order Approximation 4944.24 Summary and Conclusions 4984.25 Introduction to Average Current Mode Control 4994.26 Transfer Functions of Average Current Mode Controlled Converters 5044.27 The ACM Controlled Boost DC-DC Converter Design Example 5074.28 Design Verification by Average Circuit Simulations 5184.29 Design of the Voltage Control Loop 5244.30 The ACM Controlled Boost DC Voltage Regulator Design 528References 538Index 539

Majid Pakdel, PhD is affiliated with the Department of Electrical Engineering at the University of Zanjan. He has authored five books and over 50 publications in internationally reputed journals and conferences. His research interests include power electronics, artificial intelligence, microcontroller programming, and power system protection.

• Preface ix1 Averaged-Switch Modeling and Simulation 11.1 Introductory Example (Synchronous Buck Converter) 11.2 Synchronous Buck Converter State Equations 41.3 Synchronous Buck Converter Averaging and Dynamic Modeling 71.4 Point of Load Application Example 111.5 Synchronous Buck Example Control-to-Output Transfer Function 121.6 Evaluating Frequency Responses Using MATLAB and Python 151.7 Review of Closed Loop Control Principles 191.8 Review of Feedback Loop Design Principles 231.9 Design Example Synchronous Buck POL Voltage Regulator 271.10 Introduction to LTspice Simulations 391.11 LTspice Simulation Example 411.12 LTspice Simulation Example Discussion 471.13 The PSIM and MATLAB Simulation Example 491.14 The Main Result 571.15 Derivation Part 1 621.16 Null-Double Injection 661.17 Derivation Part 2 681.18 Introduction 721.19 Solution Using the Feedback Theorem 741.20 Discussion 821.21 Introduction to Closed-Loop Voltage Regulator 881.22 Output Impedance 911.23 Summary 961.24 Introduction to Circuit Averaging and Averaged Switch Modelingm 971.25 Converter Analysis Using Averaged Switch Models 1051.26 Simulations Using Averaged Switch Models 1101.27 Design Verification 1211.28 Including Losses in Averaged Switch Models 1301.29 Alternative Averaged Switch Networks 1371.30 Averaged Switch Modeling in DCM 1391.31 Combined CCM/DCM Averaged Switch Model 1461.32 Library of Spice Averaged Switch Models 1541.33 Loop Gain Simulation in CCM/DCM 1571.34 Small-Signal AC Modeling of DCM Converters 1631.35 DCM Converter Transfer Functions 169References 1702 Techniques of Design-Oriented Analysis 1712.1 Introduction to Extra Element Theorem 1712.2 EET Questions and Answers 1742.3 EET Derivation 1752.4 Practical Applications of EET 1802.5 EET Application-Effect of Capacitor ESR 1822.6 Graphical Comparison of Impedances 1862.7 Analysis of SEPIC Frequency Responses Using@EET 1902.8 SEPIC Example ZN 1952.9 SEPIC Example ZD 1992.10 Derivation of ZD Using EET 2012.11 SEPIC Example Undamped Frequency Response 2042.12 SEPIC Example Impedance Interactions 2082.13 Practical Design of Damping 2142.14 Introduction to n-Extra Element Theorem (nEET) 2212.15 nEET Application Example, Two-Section Filter 2282.16 nEET Discussion 2422.17 nEET Application Example, Damped Filter Transfer Function 2422.18 nEET Frequency Inversion 2552.19 nEET Application Example, Output Impedance 2582.20 nEET Summary 262References 2633 Input Filter Design 2653.1 Introduction to Electromagnetic Compatibility (EMC) and Interference (EMI) 2653.2 Differential and Common-Mode EMI 2703.3 EMI Measurement and Simulation Example 2723.4 Addition of Input Filter to a Converter 2863.5 Impedance Interactions 2893.6 Approaches to Input Filter Design 2943.7 Overview of MATLAB and Spice Examples 2983.8 Control to Output Transfer Function with Input Filter 3063.9 Determination of ZD and ZN 3083.10 Input Filter Design Criteria 3113.11 Corner Frequencies 3163.12 Introduction to Input Filter Damping 3173.13 Parallel RC Damping 3193.14 Damping Networks 3243.15 Optimum Damping 3253.16 Optimum Damping Summary of Results 3323.17 Multi-Stage Cascaded Filters 3373.18 Cascaded Filter Design Example 3403.19 Input Filter Design Summary 350References 3514 Current Mode Control 3534.1 Introduction to Peak Current Mode Control 3534.2 Simple Approximate Model 3614.3 Small-Signal Model Based on Simple Approximation 3674.4 Synchronous Buck POL Converter Design Example 3734.5 Oscillation for D > 0.5 3844.6 Stabilization with Addition of an Artificial Ramp 3924.7 Revisited Inclusion of Artificial Ramp Design Example 3994.8 More Accurate Average Model 4034.9 Average Spice CPM Sub-Circuit 4084.10 Design Verification Using Average Circuit Simulations 4164.11 Small-Signal AC Equivalent Circuit Models 4274.12 Transfer Functions of CPM Controlled Converters 4324.13 The CPM Controlled Boost Converter Analysis Example 4434.14 Comparison of Frequency Responses of Duty-Cycle and Current-Mode Controlled Converters 4544.15 Motivation for Modeling of High Frequency Effects 4584.16 Pulse Width Modulator as a Sampler 4624.17 Overview of Sampled Data Systems 4644.18 Sampled Data Modeling of Switching Converters 4754.19 Introduction to Sampled Data Modeling of PCM Controlled Converters 4774.20 Development of Sampled Data Model 4804.21 Frequency Responses of Sampled Data Models 4864.22 The First-Order Approximation 4894.23 The Second-Order Approximation 4944.24 Summary and Conclusions 4984.25 Introduction to Average Current Mode Control 4994.26 Transfer Functions of Average Current Mode Controlled Converters 5044.27 The ACM Controlled Boost DC-DC Converter Design Example 5074.28 Design Verification by Average Circuit Simulations 5184.29 Design of the Voltage Control Loop 5244.30 The ACM Controlled Boost DC Voltage Regulator Design 528References 538Index 539