Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

AvSumit Ahuja,Avinash Lakshminarayana

Inbunden, Engelska, 2011

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Beskrivning

This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.

Produktinformation

Utgivningsdatum:2011-10-21
Mått:155 x 235 x 16 mm
Vikt:459 g
Format:Inbunden
Språk:Engelska
Antal sidor:170
Upplaga:2012
Förlag:Springer-Verlag New York Inc.
ISBN:9781461408710

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Innehållsförteckning

Introduction.- Related Work.- Background.- Architectural Selection using High Level Synthesis.- Statistical Regression Based Power Models.- Coprocessor Design Space Exploration Using High Level Synthesis.- Regression-based Dynamic Power Estimation for FPGAs.- High Level Simulation Directed RTL Power Estimation.- Applying Verification Collaterals for Accurate Power Estimation.- Power Reduction using High-Level Clock-gating.- Model-Checking to exploit Sequential Clock-gating.- System Level Simulation Guided Approach for Clock-gating.- Conclusions.