JOSEPH A. FISHER is a Hewlett-Packard Senior Fellow at HP Labs, where he has worked since 1990 in instruction-level parallelism and in custom embedded VLIW processors and their compilers. Josh studied at the Courant Institute of NYU (B.A., M.A., and then Ph.D. in 1979), where he devised the trace scheduling compiler algorithm and coined the term instruction-level parallelism. As a professor at Yale University, he created and named VLIW architectures and invented many of the fundamental technologies of ILP. In 1984, he started Multiflow Computer with two members of his Yale team. Josh won an NSF Presidential Young Investigator Award in 1984, was the 1987 Connecticut Eli Whitney Entrepreneur of the Year, and in 2003 received the ACM/IEEE Eckert-Mauchly Award. He is also the recipient of the 2012 IEEE Computer Society B. Ramakrishna Rau Award, recognizing his work in the development of trace scheduling compilation and pioneering work in VLIW (Very Long Instruction Word) architectures. PAOLO FARABOSCHI is a Principal Research Scientist at HP Labs. Before joining Hewlett-Packard in 1994, Paolo received an M.S. (Laurea) and Ph.D. (Dottorato di Ricerca) in electrical engineering and computer science from the University of Genoa (Italy) in 1989 and 1993, respectively. His research interests skirt the boundary of hardware and software, including VLIW architectures, compilers, and embedded systems. More recently, he has been looking at the computing aspects of demanding content-processing applications. Paolo is an active member of the computer architecture community, has served in many program committees, and was Program Co-chair for MICRO (2001) and CASES (2003). CLIFF YOUNG works for D. E. Shaw Research and Development, LLC, a member of the D. E. Shaw group of companies, on projects involving special-purpose, high-performance computers for computational biochemistry. Before his current position, he was a Member of Technical Staff at Bell Laboratories in Murray Hill, New Jersey. He received A.B., S.M., and Ph.D. degrees in computer science from Harvard University in 1989, 1995, and 1998, respectively.

“Embedded Computing is enthralling in its clarity and exhilarating in its scope. If the technology you are working on is associated with VLIWs or "embedded computing", then clearly it is imperative that you read this book. If you are involved in computer system design or programming, you must still read this book, because it will take you to places where the views are spectacular. You don't necessarily have to agree with every point the authors make, but you will understand what they are trying to say, and they will make you think.” --From the Foreword by Robert Colwell, R&E Colwell & Assoc. Inc

• PrefaceChapter 1: An Introduction to Embedded ProcessingChapter 2: An Overview of VLIW and ILPChapter 3: An Overview of ISA DesignChapter 4: Architectural Structures in ISA design Chapter 5: Microarchitecture Design Chapter 6: System Design and SimulationChapter 7: Embedded Compiling and Toolchains Chapter 8: Compiling for VLIWs and ILP Chapter 9: The Run-time System Chapter 10: Application Design and Customization Chapter 11: Application Areas Appendix A: The VEX System Appendix B: Glossary Appendix C: Bibliography

JOSEPH A. FISHER is a Hewlett-Packard Senior Fellow at HP Labs, where he has worked since 1990 in instruction-level parallelism and in custom embedded VLIW processors and their compilers. Josh studied at the Courant Institute of NYU (B.A., M.A., and then Ph.D. in 1979), where he devised the trace scheduling compiler algorithm and coined the term instruction-level parallelism. As a professor at Yale University, he created and named VLIW architectures and invented many of the fundamental technologies of ILP. In 1984, he started Multiflow Computer with two members of his Yale team. Josh won an NSF Presidential Young Investigator Award in 1984, was the 1987 Connecticut Eli Whitney Entrepreneur of the Year, and in 2003 received the ACM/IEEE Eckert-Mauchly Award. He is also the recipient of the 2012 IEEE Computer Society B. Ramakrishna Rau Award, recognizing his work in the development of trace scheduling compilation and pioneering work in VLIW (Very Long Instruction Word) architectures. PAOLO FARABOSCHI is a Principal Research Scientist at HP Labs. Before joining Hewlett-Packard in 1994, Paolo received an M.S. (Laurea) and Ph.D. (Dottorato di Ricerca) in electrical engineering and computer science from the University of Genoa (Italy) in 1989 and 1993, respectively. His research interests skirt the boundary of hardware and software, including VLIW architectures, compilers, and embedded systems. More recently, he has been looking at the computing aspects of demanding content-processing applications. Paolo is an active member of the computer architecture community, has served in many program committees, and was Program Co-chair for MICRO (2001) and CASES (2003). CLIFF YOUNG works for D. E. Shaw Research and Development, LLC, a member of the D. E. Shaw group of companies, on projects involving special-purpose, high-performance computers for computational biochemistry. Before his current position, he was a Member of Technical Staff at Bell Laboratories in Murray Hill, New Jersey. He received A.B., S.M., and Ph.D. degrees in computer science from Harvard University in 1989, 1995, and 1998, respectively.

“Embedded Computing is enthralling in its clarity and exhilarating in its scope. If the technology you are working on is associated with VLIWs or "embedded computing", then clearly it is imperative that you read this book. If you are involved in computer system design or programming, you must still read this book, because it will take you to places where the views are spectacular. You don't necessarily have to agree with every point the authors make, but you will understand what they are trying to say, and they will make you think.” --From the Foreword by Robert Colwell, R&E Colwell & Assoc. Inc

• PrefaceChapter 1: An Introduction to Embedded ProcessingChapter 2: An Overview of VLIW and ILPChapter 3: An Overview of ISA DesignChapter 4: Architectural Structures in ISA design Chapter 5: Microarchitecture Design Chapter 6: System Design and SimulationChapter 7: Embedded Compiling and Toolchains Chapter 8: Compiling for VLIWs and ILP Chapter 9: The Run-time System Chapter 10: Application Design and Customization Chapter 11: Application Areas Appendix A: The VEX System Appendix B: Glossary Appendix C: Bibliography