Fabien Ndagijimana is Professor at Minatec, Grenoble, France.

• INTRODUCTION ixCHAPTER 1. DEGRADATION OF RISE TIME IN INTERCONNECTS 11.1. Propagation issues in interconnects 11.1.1. Evolution of digital circuits 11.1.2. Evolution of signals in interconnects 21.1.3. Propagation time on networks 41.1.4. Propagation delay in integrated circuits 51.1.5. Spectral analysis of signals 61.2. Behavior of components at high frequencies 71.2.1. Contact wire behavior 71.2.2. Resistance behavior at radiofrequencies (RF) 81.2.3. RF inductance behavior 81.2.4. Capacitance behavior at RF 91.2.5. Effects of losses due to conductors: skin effect 111.3. Effect on transmission of signals on interconnects 131.3.1. Filtering by transmission channel 131.3.2. Degradation of rise time in a limited-bandwidth channel 141.3.3. Example of a first-order low-pass RC filter 151.3.4. Effects of resistive losses from skin effect 161.3.5. Rise time in cascading circuits 171.3.6. Transmission quality criteria: eye diagram 191.4. Measurement of rise time 191.4.1. Different definitions of rise time 191.4.2. Measurement principle 201.4.3. Effect of measuring sensor 201.5. Conclusion 21CHAPTER 2. ELECTROMAGNETIC MODELING OF INTERCONNECTS 232.1. Global modeling of signal integrity 232.1.1. ICEM and ICIM models 232.1.2. IBIS models 242.1.3. I/V characteristics of buffers 252.1.4. I/V characteristics of the IBIS model 252.2. RC interconnect model 272.2.1. RC model 272.2.2. The Elmore constant 282.3. Capacitive and inductive modeling 282.3.1. Capacitive modeling 292.3.2. Inductive modeling 302.4. LC line modeling 352.5. Application to electronic packages and MCM 372.5.1. Different types of electronic packages 372.5.2. Multichip modules 392.5.3. LC modeling of packages 402.5.4. 2.5D and 3D electromagnetic simulations 432.6. Conclusion 45CHAPTER 3. CONTROLLED IMPEDANCE INTERCONNECTS 473.1. Why control impedance? 473.1.1. Effect of interconnect length 473.1.2. Classification of interconnects by the signal carried 513.2. Influence of rise time on signal degradation 523.3. Model of a controlled impedance interconnect 533.3.1. Characteristic impedance: definition 533.3.2. Configuration of controlled impedance interconnects 543.4. Interconnects on PCBs 553.4.1. Controlled impedance on PCB 553.4.2. Transition between lines and discontinuity 573.4.3. Extraction of values from equivalent schema 603.5. Impedance control for a microstrip configuration 613.5.1. Effect of effective permittivity 613.5.2. Limitations on a typical digital circuit 623.5.3. Effect of ribbon thickness or protective resin 633.6. Analysis of propagation in interconnects 643.6.1. Reflection and transmission on termination 643.6.2. Reflection and transmission during an impedance break 653.6.3. Reflection and transmission on a bus 663.7. Effect on data bus configuration 683.8. Application to clock distribution 693.9. Conclusion 71CHAPTER 4. PROPAGATION ON TRANSMISSION LINES 734.1. Transmission line model 734.1.1. Modes of propagation on lines 744.2. Propagation modes related to substrate 764.2.1. Quasi-TEM mode 774.2.2. Skin-effect mode 784.2.3. Slow wave mode 794.2.4. Transition zone 804.3. Equation of propagation on transmission lines 814.3.1. Propagation equation 824.3.2. Input impedance 854.3.3. Interconnect behavior according to length and loads 854.3.4. Case of electrically short lines 864.4. Conclusion 87CHAPTER 5. THE S-PARAMETERS TESTING TECHNIQUE 895.1. Definition of measured parameters 895.1.1. Reflection and transmission 895.1.2. Reflection coefficient and SWR on interconnects 905.2. The S-parameters principle 925.2.1. Definitions 925.2.2. Input impedance of a circuit terminated by an impedance 935.3. Measurement of S parameters 945.3.1. Standard calibrations of a vectorial analyzer 965.3.2. Short-open-load-thru (SOLT) calibration 965.3.3. Thru-Reflect-Line (TRL) calibration 985.3.4. One-port measurement technique 995.4. Measurement of characteristic line impedance 1005.4.1. Short-circuit and open-circuit method 1005.4.2. R0-loaded line method 1025.4.3. Equivalent line based on S parameters 1035.5. Measurement of line capacitance 1045.5.1. Short-circuit and open-circuit measurement method 1045.5.2. Loaded line measurement method 1045.6. Components on PCB and de-embedding techniques 1055.6.1. Impedance measurement on PCB 1065.6.2. T and C series matrices 1065.6.3. ABCD matrix of a transmission line 1075.6.4. De-embedding procedure 1095.7. Characterization of dielectric materials for interconnects 1115.7.1. Metal–insulating material–metal capacity method for insulating materials in integrated technologies 1115.7.2. Effective permittivity of a transmission line 1135.7.3. Case of microribbon, tri-plate or coplanar lines 1145.8. Conclusion 115CHAPTER 6. TIME-DOMAIN REFLECTOMETRY ANALYSIS 1176.1. Principle of TDR 1176.2. Reflection and transmission of voltage 1186.2.1. Observable voltages 1186.2.2. Effects of multiple reflections in high-speed circuits 1206.3. Measurement of characteristic impedance 1206.3.1. Impedance measurement with an impulse generator 1206.3.2. Impedance measurement with an echelon 1226.3.3. Case of cascaded impedances 1236.4. Reflection on reactive loads 1246.5. Extraction of equivalent schemas 1256.5.1. Definition of equivalent schema 1256.5.2. Extraction of an inductive discontinuity or component 1276.5.3. Case of a capacitive discontinuity or component 1296.5.4. Case of a series inductance and parallel capacitance 1316.6. Discontinuities in cascade 1336.6.1. Spatial resolution 1336.6.2. Example of inductance and capacitance extraction 1336.7. Conclusion 135CHAPTER 7. INTERFERENCE AND CROSS-TALK IN INTERCONNECTS 1377.1. Coupling and interferences due to substrate 1377.1.1. ICEM model for substrate coupling 1387.1.2. Guard ring and insulation well 1407.2. Theory of coupling between lines 1407.2.1. Interline coupling model 1417.2.2. Coupling signals at endings 1447.2.3. Model of coupling in interconnects on PCB 1457.3. Application to high-speed cables, buses and connectors 1507.3.1. Stresses in high-speed buses 1507.3.2. Standardization of data transmission cables 1517.3.3. Categories of high-speed ethernet systems 1537.4. Conclusion 155BIBLIOGRAPHY 157INDEX 159