Digital Electronics 2

Tertulien Ndjountche received a PhD degree in electrical engineering from Erlangen-Nuremberg University in Germany. He has worked as a professor and researcher at universities in Germany and Canada. He has published numerous technical papers and books in his fields of interest.

• Preface ixChapter 1. Latch and Flip-Flop 11.1. Introduction  11.2. General overview 11.2.1. SR latch 61.2.2. S R latch  91.2.3. Application: switch debouncing 111.3. Gated SR latch 111.3.1. Implementation based on an SR latch  121.3.2. Implementation based on an S R latch 141.4. Gated D latch  151.5. Basic JK flip-flop 161.6. T flip-flop  181.7. Master-slave and edge-triggered flip-flop  201.7.1. Master-slave flip-flop 201.7.2. Edge-triggered flip-flop  241.8. Flip-flops with asynchronous inputs 301.9. Operational characteristics of flip-flops 331.10. Exercises 341.11. Solutions 39Chapter 2. Binary Counters  512.1. Introduction  512.2. Modulo 4 counter 522.3. Modulo 8 counter 532.4. Modulo 16 counter  552.4.1. Modulo 10 counter  572.5. Counter with parallel load  602.6. Down counter 622.7. Synchronous reversible counter 642.8. Decoding a down counter 652.9. Exercises  662.10. Solutions 73Chapter 3. Shift Register 853.1. Introduction  853.2. Serial-in shift register 853.3. Parallel-in shift register  853.4. Bidirectional shift register  883.5. Register file 903.6. Shift register based counter  913.6.1. Ring counter  923.6.2. Johnson counter  933.6.3. Linear feedback counter 943.7. Exercises  1013.8. Solutions  107Chapter 4. Arithmetic and Logic Circuits 1174.1. Introduction  1174.2. Adder  1174.2.1. Half adder 1174.2.2. Full adder  1194.2.3. Ripple-carry adder 1204.2.4. Carry-lookahead adder  1224.2.5. Carry-select adder 1244.2.6. Carry-skip adder  1254.3. Comparator 1274.4. Arithmetic and logic unit 1294.5. Multiplier  1364.5.1. Multiplier of 2-bit unsigned numbers  1364.5.2. Multiplier of 4-bit unsigned numbers  1374.5.3. Multiplier for signed numbers  1384.6. Divider 1434.7. Exercises  1494.8. Solutions  158Chapter 5. Digital Integrated Circuit Technology  1775.1. Introduction 1775.2. Characteristics of the technologies  1775.2.1. Supply voltage 1775.2.2. Logic levels  1785.2.3. Immunity to noise 1785.2.4. Propagation delay 1795.2.5. Electric power consumption 1795.2.6. Fan-out or load factor 1795.3. TTL logic family  1805.3.1. Bipolar junction transistor  1805.3.2. TTL NAND gate  1815.3.3. Integrated TTL circuit 1825.4. CMOS logic family  1835.4.1. MOSFET transistor  1835.4.2. CMOS logic gates 1845.5. Open drain logic gates 1855.5.1. Three-state buffer 1875.5.2. CMOS integrated circuit 1885.6. Other logic families  1895.7. Interfacing circuits of different technologies  1895.8. Exercises  1905.9. Solutions  193Chapter 6. Semiconductor Memory  1956.1. Introduction  1956.2. Memory organization 1956.3. Operation of a memory  1976.4. Types of memory 1996.4.1. Non-volatile memory 1996.4.2. Volatile memories 2026.4.3. Characteristics of the different memory types 2076.5. Applications  2076.5.1. Memory organization 2086.5.2. Applications  2096.6. Other types of memory  2186.6.1. Ferromagnetic RAM 2206.6.2. Content-addressable memory 2226.6.3. Sequential access memory  2236.7. Exercises  2266.8. Solutions  230Chapter 7. Programmable Logic Circuits 2457.1. General overview 2457.2. Programmable logic device  2467.3. Applications  2557.3.1. Implementation of logic functions  2557.3.2. Two-bit adder 2577.3.3. Binary-to-BCD and BCD-to-binary converters 2637.4. Programmable logic circuits (CPLD and FPGA)  2637.4.1. Principle and technology 2647.4.2. CPLD  2687.4.3. FPGA  2707.5. References 2747.6. Exercises  2757.7. Solutions  284Appendix  307Bibliography 309Index  311