From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators

Abbas Rahimi is currently a Postdoctoral Scholar in the Department of Electrical Engineering and Computer Sciences at the University of California Berkeley, Berkeley, CA, USA. He is a member of the Berkeley Wireless Research Center and collaborating with UC Berkeley’s Redwood Center for Theoretical Neuroscience. Rahimi has a B.S. in computer engineering from the University of Tehran, Tehran, Iran (2010) and an M.S. and a Ph.D. in computer science and engineering from the University of California San Diego, La Jolla, CA, USA (2015). His research interests include brain-inspired computing, approximate computing, massively parallel integrated architectures, embedded systems and software with an emphasis on improving energy efficiency and robustness. His doctoral dissertation has been selected to receive the 2015 Outstanding Dissertation Award in the area of "New Directions in Embedded System Design and Embedded Software" from the European Design and Automation Association. He has published more than 40 papers in top tier conferences and journals, and received the Best Paper Candidate at 50th IEEE/ACM Design Automation Conference.Luca Benini is a Professor of Digital Circuits and Systems at ETH Zurich, Switzerland, and is also a Professor at University of Bologna, Italy. He has a PhD in Electrical Engineering from Stanford University (1997). His research interests are in energy-efficient system design and multicore SoC design. He is a Fellow of both IEEE and ACM, and  member of the Academia Europea.Rajesh K. Gupta is a Professor of Computer Science and Engineering at the University of California San Diego (UCSD), La Jolla, CA, USA and holds the Qualcomm endowed chair. Gupta has a BTech in electrical engineering from the Indian Institute of Technology, Kanpur, India (1984), an MS in electrical engineering and computer science from the University of California Berkeley, Berkeley, CA, USA (1986), and a PhD in electrical engineering from Stanford University, Stanford, CA, USA (1994). He is a Fellow of both IEEE and ACM.

• Introduction.- Part 1. Predicting and Preventing Errors.- Instruction-Level Tolerance.- Sequence-Level Tolerance.- Procedure-Level Tolerance.- Kernel-Level Tolerance.- Hierarchically Focused Guardbanding.- Part 2. Detecting and Correcting Errors.- Work-Unit Tolerance.- Memristive-Based Associative Memory for Error Recovery.- Part 3. Accepting Errors.- Accuracy-Configurable OpenMP.- An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration.- Memristive-Based Associative Memory for Approximate Computational Reuse.- Spatial and Temporal Memoization.- Outlook.