Computer Aided Verification

6th International Conference, CAV '94, Stanford, California, USA, June 21-23, 1994. Proceedings

AvDavid L. Dill

Häftad, Engelska, 1994

Del i serien Lecture Notes in Computer Science

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Beskrivning

This volume contains the proceedings of the 6th Conference on Computer Aided Verification, held at Stanford University in June 1994. The in total 37 included papers were selected in a highly competetive reviewing process from 121 submissions; in total they document many of the most important advances achieved in CAV research and applications since the predecessor conference held in June 1993.The volume is organized in sections on Real-Time Systems, CAV Theory, CAV Applications, Symbolic Verification, Hybrid Systems, Model Checking, Improving Efficiency, and Hardware Verification.

Produktinformation

Utgivningsdatum:1994-06-01
Mått:155 x 235 x 27 mm
Vikt:744 g
Format:Häftad
Språk:Engelska
Serie:Lecture Notes in Computer Science
Antal sidor:486
Upplaga:1994
Förlag:Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
ISBN:9783540581796

Utforska kategorier

Systemvetenskap och AI inom Data och IT
Programmeringsböcker inom Data och IT

Innehållsförteckning

A determinizable class of timed automata.- Real-time system verification using P/T nets.- Criteria for the simple path property in timed automata.- Hierarchical representations of discrete functions, with application to model checking.- Symbolic verification with periodic sets.- Automatic verification of pipelined microprocessor control.- Using abstractions for the verification of linear hybrid systems.- Decidability of hybrid systems with rectangular differential inclusions.- Suspension automata: A decidable class of hybrid automata.- Verification of context-free timed systems using linear hybrid observers.- On the random walk method for protocol testing.- An automata-theoretic approach to branching-time model checking (Extended abstract).- Realizability and synthesis of reactive modules.- Model checking of macro processes.- Methodology and system for practical formal verification of reactive hardware.- Modeling and verification of a real life protocol using symbolic model checking.-Verification of a distributed cache memory by using abstractions.- Beyond model checking.- Models whose checks don't explode.- On the automatic computation of network invariants.- Ground temporal logic: A logic for hardware verification.- A hybrid model for reasoning about composed hardware systems.- Composing symbolic trajectory evaluation results.- The completeness of a hardware inference system.- Efficient model checking by automated ordering of transition relation partitions.- The verification problem for safe replaceability.- Formula-dependent equivalence for compositional CTL model checking.- An improved algorithm for the evaluation of fixpoint expressions.- Incremental model checking in the modal mu-calculus.- Performance improvement of state space exploration by regular & differential hashing functions.- Combining partial order reductions with on-the-fly model-checking.- Improving language containment using fairness graphs.- A parallel algorithm for relational coarsest partition problems and its implementation.- Another look at LTL model checking.- The mobility workbench — A tool for the ?-Calculus.- Compositional semantics of Esterel and verification by compositional reductions.- Model checking using adaptive state and data abstraction.- Automatic verification of timed circuits.