With the proliferation of VHDL, the reference material also grew in the same order. Today there is good amount of scholarly literature including many books describing various aspects of VHDL. However, an indepth review of these books reveals a different story. Many of them have emerged simply as an improved version of the manual. While some of them deal with the system design issues, they lack appropriate exemplifying to illustrate the concepts. Others give large number of examples, but lack the VLSI system design issues. In nutshell, the fact which gone unnoticed by most of the books, is the growth of the VLSI is not merely due to the language itself, but more due to the development of large number of third party tools useful from the FPGA or semicustom ASIC realization point of view. In the proposed book, the authors have synergized the VHDL programming with appropriate EDA tools so as to present a full proof system design to the readers. In this book along with the VHDL coding issues, the simulation and synthesis with the various toolsets enables the potential reader to visualize the final design. The VHDL design codes have been synthesized using different third party tools such as Xilinx Web pack Ver.11, Modelsim PE, Leonrado Spectrum and Synplify Pro. Mixed flow illustrated by using the above mentioned tools presents an insight to optimize the design with reference to the spatial, temporal and power metrics.
