Advanced Software Technologies for Post-Peta Scale Computing

Mitsuhisa Sato is a deputy director of the RIKEN Center for Computational Science (R-CCS). He was a professor at the Graduate School of Systems and Information Engineering, University of Tsukuba from 2001. He has been working as a director of the Center for Computational Sciences, University of Tsukuba from 2007 to 2013. Since October 2010, he is appointed to the research team leader of programming environment research team in the Advanced Institute of Computational Science (AICS), former R-CCS, which was the organization to run Japanese petaflops facility "K computer". Since 2014, he is working as a team leader of architecture development team in the Japanese FLAGSHIP2020 project to develop the next system of the K computer in R-CCS. He is a professor (Cooperative Graduate School Program) and professor emeritus of University of Tsukuba.

• JST CREST Post-petascale software project bridging to exascale computing.- ppOpen-HPC/pK-Open-HPC: Application Development Framework with Automatic Tuning (AT).- Scalable Eigen-analysis Engine for Large-scale Eigenvalue Problems.- System Software for Many-core & Multi-core Architecture.- Highly Productive, High Performance Application Frameworks for Post Petascale Computing.- System Software for Data-intensive Science.- Approaches for Memory-Efficient Communication Library and Runtime Communication Optimization.- A development platform for embedded domain-specific languages.- Xevolver: a user-defined code transformation approach to streamlining legacy code migration.- Numerical Library Based on Hierarchical Domain Decomposition.- Advanced Computing & Optimization Infrastructure for Extremely Large-Scale Graphs on Post Peta-Scale Supercomputers.- Software Technology that Deals with Deeper Memory Hierarchy in Post-petascale Era.- Power Management Framework for Post-Petascale Supercomputers.- Project CASSIA —Framework for Exhaustive and Large-scale Social Simulation—.- GPU Accelerated Language and Communication Support by FPGA.