CHIH-HANG TUNG is a senior member of the technical staff and Project Leader at the Institute of Microelectronics in Singapore. GEORGE T. T. SHENG was the first to develop cross-sectioning samples of TEM studies of semiconductor devices and has been involved with many other groundbreaking projects at Bell Labs.CHIH-YUAN LU is Chairman and CEO of Ardentec Corp., an ULSI testing service company. He is also CTO of Macronix International Co., Ltd., the eighth largest worldwide NVM semiconductor company.

"...provides a historical introduction to the technology as well as coverage of the evolution of basic ULSI process problems and issue." (IEEE Solid-State Circuits Society Newsletter, January 2004) "…strongly recommended…" (E-Streams, Vol. 7, No. 4)

• FOREWORD ixPREFACE xiPART I 11 Microelectronics and Microscopy 32 ULSI Process Technology 363 Applications of TEM for Construction Analysis 614 TEM Sample Preparation Techniques 90PART II 1415 Ion Implantation and Substrate Defects 1436 Dielectrics and Isolation 1797 Silicides, Polycide, and Salicide 2568 Metallization and Interconnects 287PART III 3439 ULSI Devices I: DRAM Cell with Planar Capacitor 34510 ULSI Devices II: DRAM Cell with Stacked Capacitor 36511 ULSI Devices III: DRAM Cell with Trench Capacitor 39912 ULSI Devices IV: SRAM 445PART IV 47513 TEM in Failure Analysis 47714 Novel Devices and Materials 52615 TEM in Under Bump Metallization (UBM) and Advanced Electronics Packaging Technologies 55816 High-Resolution TEM in Microelectronics 609INDEX 647

CHIH-HANG TUNG is a senior member of the technical staff and Project Leader at the Institute of Microelectronics in Singapore. GEORGE T. T. SHENG was the first to develop cross-sectioning samples of TEM studies of semiconductor devices and has been involved with many other groundbreaking projects at Bell Labs.CHIH-YUAN LU is Chairman and CEO of Ardentec Corp., an ULSI testing service company. He is also CTO of Macronix International Co., Ltd., the eighth largest worldwide NVM semiconductor company.

"...provides a historical introduction to the technology as well as coverage of the evolution of basic ULSI process problems and issue." (IEEE Solid-State Circuits Society Newsletter, January 2004) "…strongly recommended…" (E-Streams, Vol. 7, No. 4)

• FOREWORD ixPREFACE xiPART I 11 Microelectronics and Microscopy 32 ULSI Process Technology 363 Applications of TEM for Construction Analysis 614 TEM Sample Preparation Techniques 90PART II 1415 Ion Implantation and Substrate Defects 1436 Dielectrics and Isolation 1797 Silicides, Polycide, and Salicide 2568 Metallization and Interconnects 287PART III 3439 ULSI Devices I: DRAM Cell with Planar Capacitor 34510 ULSI Devices II: DRAM Cell with Stacked Capacitor 36511 ULSI Devices III: DRAM Cell with Trench Capacitor 39912 ULSI Devices IV: SRAM 445PART IV 47513 TEM in Failure Analysis 47714 Novel Devices and Materials 52615 TEM in Under Bump Metallization (UBM) and Advanced Electronics Packaging Technologies 55816 High-Resolution TEM in Microelectronics 609INDEX 647

CHIH-HANG TUNG is a senior member of the technical staff and Project Leader at the Institute of Microelectronics in Singapore. GEORGE T. T. SHENG was the first to develop cross-sectioning samples of TEM studies of semiconductor devices and has been involved with many other groundbreaking projects at Bell Labs.CHIH-YUAN LU is Chairman and CEO of Ardentec Corp., an ULSI testing service company. He is also CTO of Macronix International Co., Ltd., the eighth largest worldwide NVM semiconductor company.

"...provides a historical introduction to the technology as well as coverage of the evolution of basic ULSI process problems and issue." (IEEE Solid-State Circuits Society Newsletter, January 2004) "…strongly recommended…" (E-Streams, Vol. 7, No. 4)

• FOREWORD ixPREFACE xiPART I 11 Microelectronics and Microscopy 32 ULSI Process Technology 363 Applications of TEM for Construction Analysis 614 TEM Sample Preparation Techniques 90PART II 1415 Ion Implantation and Substrate Defects 1436 Dielectrics and Isolation 1797 Silicides, Polycide, and Salicide 2568 Metallization and Interconnects 287PART III 3439 ULSI Devices I: DRAM Cell with Planar Capacitor 34510 ULSI Devices II: DRAM Cell with Stacked Capacitor 36511 ULSI Devices III: DRAM Cell with Trench Capacitor 39912 ULSI Devices IV: SRAM 445PART IV 47513 TEM in Failure Analysis 47714 Novel Devices and Materials 52615 TEM in Under Bump Metallization (UBM) and Advanced Electronics Packaging Technologies 55816 High-Resolution TEM in Microelectronics 609INDEX 647