Digital Control of High-Frequency Switched-Mode Power Converters

Luca Corradini, PhD, is an Assistant Professor at the University of Padova, Italy. He is the co-author of more than fifty articles published in journals and conference proceedings.Dragan Maksimovic, PhD is a Charles V. Schelke Endowed Professor and Director of the Colorado Power Electronics Center (CoPEC) at the University of Colorado at Boulder, USA.Paolo Mattavelli, PhD, joined the DTG of the University of Padova, Italy. Dr. Mattavelli's major fields of interest include analysis, and modeling and control of power converters.Regan Zane, PhD, is a Professor of Electrical and Computer Engineering at the University of Colorado at Boulder, USA. Dr. Zane received the NSF Career Award in 2004 for his work in energy efficient lighting systems.

• Preface ixIntroduction 1Chapter 1 Continuous-Time Averaged Modeling of DC–DC Converters 131.1 Pulse Width Modulated Converters 141.2 Converters in Steady State 161.2.1 Boost Converter Example 171.2.2 Estimation of the Switching Ripple 191.2.3 Voltage Conversion Ratios of Basic Converters 201.3 Converter Dynamics and Control 211.3.1 Converter Averaging and Linearization 221.3.2 Modeling of the Pulse Width Modulator 241.3.3 The System Loop Gain 251.3.4 Averaged Small-Signal Models of Basic Converters 261.4 State-Space Averaging 281.4.1 Converter Steady-State Operating Point 281.4.2 Averaged Small-Signal State-Space Model 291.4.3 Boost Converter Example 301.5 Design Examples 321.5.1 Voltage-Mode Control of a Synchronous Buck Converter 321.5.2 Average Current-Mode Control of a Boost Converter 421.6 Duty Ratio d[k] Versus d(t) 481.7 Summary of Key Points 50Chapter 2 The Digital Control Loop 512.1 Case Study: Digital Voltage-Mode Control 522.2 A/D Conversion 532.2.1 Sampling Rate 532.2.2 Amplitude Quantization 562.3 The Digital Compensator 582.4 Digital Pulse Width Modulation 632.5 Loop Delays 652.5.1 Control Delays 652.5.2 Modulation Delay 662.5.3 Total Loop Delay 702.6 Use of Averaged Models in Digital Control Design 712.6.1 Limitations of Averaged Modeling 712.6.2 Averaged Modeling of a Digitally Controlled Converter 742.7 Summary of Key Points 78Chapter 3 Discrete-Time Modeling 793.1 Discrete-Time Small-Signal Modeling 803.1.1 A Preliminary Example: A Switched Inductor 823.1.2 The General Case 853.1.3 Discrete-Time Models for Basic Types of PWM Modulation 873.2 Discrete-Time Modeling Examples 883.2.1 Synchronous Buck Converter 903.2.2 Boost Converter 973.3 Discrete-Time Modeling of Time-Invariant Topologies 1023.3.1 Equivalence to Discrete-Time Modeling 1063.3.2 Relationship with the Modified Z-Transform 1083.3.3 Calculation of Tu(z) 1083.3.4 Buck Converter Example Revisited 1123.4 Matlab® Discrete-Time Modeling of Basic Converters 1123.5 Summary of Key Points 117Chapter 4 Digital Control 1194.1 System-Level Compensator Design 1194.1.1 Direct-Digital Design Using the Bilinear Transform Method 1204.1.2 Digital PID Compensators in the z- and the p-Domains 1234.2 Design Examples 1264.2.1 Digital Voltage-Mode Control of a Synchronous Buck Converter 1264.2.2 Digital Current-Mode Control of a Boost Converter 1344.2.3 Multiloop Control of a Synchronous Buck Converter 1364.2.4 Boost Power Factor Corrector 1414.3 Other Converter Transfer Functions 1544.4 Actuator Saturation and Integral Anti-Windup Provisions 1604.5 Summary of Key Points 165Chapter 5 Amplitude Quantization 1675.1 System Quantizations 1675.1.1 A/D Converter 1675.1.2 DPWM Quantization 1695.2 Steady-State Solution 1725.3 No-Limit-Cycling Conditions 1755.3.1 DPWM versus A/D Resolution 1755.3.2 Integral Gain 1785.3.3 Dynamic Quantization Effects 1815.4 DPWM and A/D Implementation Techniques 1825.4.1 DPWM Hardware Implementation Techniques 1825.4.2 Effective DPWM Resolution Improvements via ΣΔ Modulation 1865.4.3 A/D Converters 1875.5 Summary of Key Points 190Chapter 6 Compensator Implementation 1916.1 PID Compensator Realizations 1946.2 Coefficient Scaling and Quantization 1976.2.1 Coefficients Scaling 1986.2.2 Coefficients Quantization 2006.3 Voltage-Mode Control Example: Coefficients Quantization 2036.3.1 Parallel Structure 2046.3.2 Direct Structure 2066.3.3 Cascade Structure 2086.4 Fixed-Point Controller Implementation 2136.4.1 Effective Dynamic Range and Hardware Dynamic Range 2146.4.2 Upper Bound of a Signal and the L1-Norm 2166.5 Voltage-Mode Converter Example: Fixed-Point Implementation 2186.5.1 Parallel Realization 2206.5.2 Direct Realization 2256.5.3 Cascade Realization 2296.5.4 Linear versus Quantized System Response 2336.6 HDL Implementation of the Controller 2346.6.1 VHDL Example 2356.6.2 Verilog Example 2376.7 Summary of Key Points 239Chapter 7 Digital Autotuning 2417.1 Introduction to Digital Autotuning 2427.2 Programmable PID Structures 2437.3 Autotuning VIA Injection of a Digital Perturbation 2477.3.1 Theory of Operation 2497.3.2 Implementation of a PD Autotuner 2537.3.3 Simulation Example 2557.3.4 Small-Signal Analysis of the PD Autotuning Loop 2617.4 Digital Autotuning Based on Relay Feedback 2657.4.1 Theory of Operation 2667.4.2 Implementation of a Digital Relay Feedback Autotuner 2677.4.3 Simulation Example 2717.5 Implementation Issues 2727.6 Summary of Key Points 275Appendix A Discrete-Time Linear Systems and The Z-Transform 277A.1 Difference Equations 277A.1.1 Forced Response 278A.1.2 Free Response 279A.1.3 Impulse Response and System Modes 281A.1.4 Asymptotic Behavior of the Modes 282A.1.5 Further Examples 283A.2 Z-Transform 284A.2.1 Definition 284A.2.2 Properties 285A.3 The Transfer Function 287A.3.1 Stability 287A.3.2 Frequency Response 288A.4 State-Space Representation 288Appendix B Fixed-Point Arithmetic and HDL Coding 291B.1 Rounding Operation and Round-Off Error 291B.2 Floating-Point versus Fixed-Point Arithmetic Systems 293B.3 Binary Two’s Complement (B2C) Fixed-Point Representation 294B.4 Signal Notation 296B.5 Manipulation of B2C Quantities and HDL Examples 297B.5.1 Sign Extension 298B.5.2 Alignment 299B.5.3 Sign Reversal 301B.5.4 LSB and MSB Truncation 302B.5.5 Addition and Subtraction 304B.5.6 Multiplication 305B.5.7 Overflow Detection and Saturated Arithmetic 307Appendix C Small-Signal Phase Lag of Uniformly Sampled Pulse Width Modulators 313C.1 Trailing-Edge Modulators 313C.2 Leading-Edge Modulators 317C.3 Symmetrical Modulators 318References 321Index 335