Artificial Intelligence Applications and Reconfigurable Architectures

Anuradha Thakare, PhD, is a Dean of International Relations and Professor in the Department of Computer Engineering at Pimpri Chinchwad College of Engineering, Pune, India. She has more than 22 years of experience in academics and research and has published more than 80 research articles in SCI journals as well several books. Sheetal Bhandari, PhD, received her degree in the area of reconfigurable computing. She is a postgraduate in electronics engineering from the University of Pune with a specialization in digital systems. She is working as a professor in the Department of Electronics and Telecommunication Engineering and Dean of Academics at Pimpri Chinchwad College of Engineering. Her research area concerns reconfigurable computing and embedded system design around FPGA HW-SW Co-Design.

• Preface xiii1 Strategic Infrastructural Developments to Reinforce Reconfigurable Computing for Indigenous AI Applications 1Deepti Khurge1.1 Introduction 21.2 Infrastructural Requirements for AI 21.3 Categories in AI Hardware 41.3.1 Comparing Hardware for Artificial Intelligence 81.4 Hardware AI Accelerators to Support RC 91.4.1 Computing Support for AI Application: Reconfigurable Computing to Foster the Adaptation 91.4.2 Reconfiguration Computing Model 101.4.3 Reconfigurable Computing Model as an Accelerator 111.5 Architecture and Accelerator for AI-Based Applications 151.5.1 Advantages of Reconfigurable Computing Accelerators 201.5.2 Disadvantages of Reconfigurable Computing Accelerators 211.6 Conclusion 22References 222 Review of Artificial Intelligence Applications and Architectures 25Rashmi Mahajan, Dipti Sakhare and Rohini Gadgil2.1 Introduction 252.2 Technological Platforms for AI Implementation—Graphics Processing Unit 272.3 Technological Platforms for AI Implementation—Field Programmable Gate Array (FPGA) 282.3.1 Xilinx Zynq 282.3.2 Stratix 10 NX Architecture 292.4 Design Implementation Aspects 302.5 Conclusion 32References 323 An Organized Literature Review on Various Cubic Root Algorithmic Practices for Developing Efficient VLSI Computing System—Understanding Complexity 35Siba Kumar Panda, Konasagar Achyut, Swati K. Kulkarni, Akshata A. Raut and Aayush Nayak3.1 Introduction 363.2 Motivation 373.3 Numerous Cubic Root Methods for Emergent VLSI Computing System—Extraction 453.4 Performance Study and Discussion 503.5 Further Research 503.6 Conclusion 59References 594 An Overview of the Hierarchical Temporal Memory Accelerators 63Abdullah M. Zyarah and Dhireesha Kudithipudi4.1 Introduction 634.2 An Overview of Hierarchical Temporal Memory 654.3 HTM on Edge 674.4 Digital Accelerators 684.4.1 Pim Htm 684.4.2 Pen Htm 694.4.3 Classic 704.5 Analog and Mixed-Signal Accelerators 724.5.1 Rcn Htm 724.5.2 Rbm Htm 734.5.3 Pyragrid 744.6 Discussion 764.6.1 On-Chip Learning 764.6.2 Data Movement 774.6.3 Memory Requirements 794.6.4 Scalability 804.6.5 Network Lifespan 824.6.6 Network Latency 834.6.6.1 Parallelism 844.6.6.2 Pipelining 854.6.7 Power Consumption 864.7 Open Problems 884.8 Conclusion 89References 905 NLP-Based AI-Powered Sanskrit Voice Bot 95Vedika Srivastava, Arti Khaparde, Akshit Kothari and Vaidehi Deshmukh5.1 Introduction 965.2 Literature Survey 965.3 Pipeline 985.3.1 Collect Data 985.3.2 Clean Data 985.3.3 Build Database 985.3.4 Install Required Libraries 985.3.5 Train and Validate 985.3.6 Test and Update 985.3.7 Combine All Models 1005.3.8 Deploy the Bot 1005.4 Methodology 1005.4.1 Data Collection and Storage 1005.4.1.1 Web Scrapping 1005.4.1.2 Read Text from Image 1015.4.1.3 MySQL Connectivity 1015.4.1.4 Cleaning the Data 1015.4.2 Various ML Models 1025.4.2.1 Linear Regression and Logistic Regression 1025.4.2.2 SVM – Support Vector Machine 1035.4.2.3 PCA – Principal Component Analysis 1045.4.3 Data Pre-Processing and NLP Pipeline 1055.5 Results 1065.5.1 Web Scrapping and MySQL Connectivity 1065.5.2 Read Text from Image 1075.5.3 Data Pre-Processing 1085.5.4 Linear Regression 1095.5.5 Linear Regression Using TensorFlow 1095.5.6 Bias and Variance for Linear Regression 1125.5.7 Logistic Regression 1135.5.8 Classification Using TensorFlow 1145.5.9 Support Vector Machines (SVM) 1155.5.10 Principal Component Analysis (PCA) 1165.5.11 Anomaly Detection and Speech Recognition 1175.5.12 Text Recognition 1195.6 Further Discussion on Classification Algorithms 1195.6.1 Using Maximum Likelihood Estimator 1195.6.2 Using Gradient Descent 1225.6.3 Using Naive Bayes’ Decision Theory 1235.7 Conclusion 123Acknowledgment 123References 1236 Automated Attendance Using Face Recognition 125Kapil Tajane, Vinit Hande, Rohan Nagapure, Rohan Patil and Rushabh Porwal6.1 Introduction 1266.2 All Modules Details 1276.2.1 Face Detection Model 1276.2.2 Image Preprocessing 1286.2.3 Trainer Model 1306.2.4 Recognizer 1306.3 Algorithm 1316.4 Proposed Architecture of System 1316.4.1 Face Detection Model 1326.4.2 Image Enhancement 1326.4.3 Trainer Model 1326.4.4 Face Recognition Model 1336.5 Conclusion 134References 1347 A Smart System for Obstacle Detection to Assist Visually Impaired in Navigating Autonomously Using Machine Learning Approach 137Vijay Dabhade, Dnyaneshwar Dhawalshankh, Anuradha Thakare, Maithili Kulkarni and Priyanka Ambekar7.1 Introduction 1387.2 Related Research 1387.3 Evaluation of Related Research 1417.4 Proposed Smart System for Obstacle Detection to Assist Visually Impaired in Navigating Autonomously Using Machine Learning Approach 1417.4.1 System Description 1417.4.2 Algorithms for Proposed Work 1427.4.3 Devices Required for the Proposed System 1467.5 Conclusion and Future Scope 148References 1488 Crop Disease Detection Accelerated by GPU 151Abhishek Chavan, Anuradha Thakare, Tulsi Chopade, Jessica Fernandes and Omkar Gawari8.1 Introduction 1528.2 Literature Review 1558.3 Algorithmic Study 1618.4 Proposed System 1628.5 Dataset 1638.6 Existing Techniques 1638.7 Conclusion 164References 1649 A Relative Study on Object and Lane Detection 167Rakshit Jha, Shruti Sonune, Mohammad Taha Shahid and Santwana Gudadhe9.1 Introduction 1689.2 Algorithmic Survey 1689.2.1 Object Detection Using Color Masking 1699.2.1.1 Color Masking 1699.2.1.2 Modules/Libraries Used 1699.2.1.3 Algorithm for Color Masking 1699.2.1.4 Advantages and Disadvantages 1709.2.1.5 Verdict 1709.2.2 Yolo v3 Object Detection 1719.2.2.1 Yolo V 3 1719.2.2.2 Algorithm Architecture 1719.2.2.3 Advantages and Disadvantages 1729.2.2.4 Verdict 1729.3 Yolo v/s Other Algorithms 1739.3.1 OverFeat 1739.3.2 Region Convolutional Neural Networks 1739.3.3 Very Deep Convolutional Networks for Large-Scale Image Recognition 1739.3.4 Deep Residual Learning for Image Recognition 1749.3.5 Deep Neural Networks for Object Detection 1749.4 Yolo and Its Version History 1749.4.1 Yolo V 1 1749.4.2 Fast YOLO 1759.4.3 Yolo V 2 1769.4.4 Yolo 9000 1769.4.5 Yolo V 3 1769.4.6 Yolo V 4 1779.4.7 Yolo V 5 1789.4.8 Pp-yolo 1789.5 A Survey in Lane Detection Approaches 1799.5.1 Lidar vs. Other Sensors 1829.6 Conclusion 182References 18310 FPGA-Based Automatic Speech Emotion Recognition Using Deep Learning Algorithm 187Rupali Kawade, Triveni Dhamale and Dipali Dhake10.1 Introduction 18810.2 Related Work 18910.2.1 Machine Learning–Based SER 18910.2.2 Deep Learning–Based SER 19310.3 FPGA Implementation of Proposed SER 19510.4 Implementation and Results 19910.5 Conclusion and Future Scope 201References 20211 Hardware Implementation of RNN Using FPGA 205Nikhil Bhosale, Sayali Battuwar, Gunjan Agrawal and S.D. Nagarale11.1 Introduction 20611.1.1 Motivation 20611.1.2 Background 20711.1.3 Literature Survey 20711.1.4 Project Specification 20911.2 Proposed Design 21011.3 Methodology 21011.3.1 Block Diagram Explanation 21311.3.2 Block Diagram for Recurrent Neural Network 21511.3.3 Textual Input Data (One Hot Encoding) 21511.4 PYNQ Architecture and Functions 21611.4.1 Hardware Specifications 21611.5 Result and Discussion 21611.6 Conclusion 217References 217Index 219