• Fri frakt över 249 kr
  • •
  • Snabba leveranser
  • •
  • Billiga böcker
Kundservice

Du är på sajten för privatpersoner.

Företag, bibliotek eller offentlig verksamhet?

Du handlar på classic.bokus.com, där alla dina funktioner finns intakta.
Till classic.bokus.com
Bokus logotyp. Gå till startsidan.
  • Erbjudanden
  • Student
  • Topplistor
  • Barn & ungdom
  • Bokus Play
  • E-böcker
  • Ljudböcker
  • Pocketböcker
  • Spel och pussel

5% studentrabatt – använd koden KURSBOK27 →

Sidfot

Mina sidor

    Hjälp

    • Kundservice
    • Vanliga frågor och svar
    • Frakt och leverans
    • Retur vid ångerrätt
    • Reklamera vara
    • Betalning
    • Köpvillkor
    • Allmänna villkor
    • Information om webbplatsens tillgänglighet

    Om Bokus

    • Om oss
    • Pressrum
    • För studenter
    • För företag
    • För bibliotek och offentlig verksamhet
    • För leverantörer
    • Hållbarhet

    Populärt

    • Aktuella erbjudanden
    • Presentkort
    • Studentlitteratur
    • Nya böcker
    • Topplistor
    • Signerade böcker
    • Engelska böcker

    Inspiration

    • Boktips
    • BookTok
    • Barnbokskaraktärer
    • Populära författare
    Logotyp för Bokus
    Följ oss på Facebook (extern länk)Följ oss på Instagram (extern länk)Följ oss på YouTube (extern länk)Följ oss på TikTok (extern länk)
    bokus @ CookiesAnpassa cookiesIntegritetspolicyKöpvillkor
    Till Citymail hemsida (extern länk)Till Budbee hemsida (extern länk)Till Postnord hemsida (extern länk)Till Schenker hemsida (extern länk)Till Early Bird hemsida (extern länk)Till Walleys hemsida (extern länk)
    1. Naturvetenskap och teknik
    2. Teknik och industri
    3. Elektronik och kommunikationer

    Network-on-Chip

    The Next Generation of System-on-Chip Integration

    AvSantanu Kundu,Santanu Chattopadhyay

    Häftad, Engelska, 2017

    1 027 kr

    Beställningsvara. Skickas inom 10-15 vardagar. Fri frakt över 249 kr.

    Fler format och utgåvor

    Inbunden

    Tillf. slut

    Beskrivning

    Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip: The Next Generation of System-on-Chip Integrationexamines the current issues restricting chip-on-chip communication efficiency, and explores Network-on-chip (NoC), a promising alternative that equips designers with the capability to produce a scalable, reusable, and high-performance communication backbone by allowing for the integration of a large number of cores on a single system-on-chip (SoC). This book provides a basic overview of topics associated with NoC-based design: communication infrastructure design, communication methodology, evaluation framework, and mapping of applications onto NoC. It details the design and evaluation of different proposed NoC structures, low-power techniques, signal integrity and reliability issues, application mapping, testing, and future trends.Utilizing examples of chips that have been implemented in industry and academia, this text presents the full architectural design of components verified through implementation in industrial CAD tools. It describes NoC research and developments, incorporates theoretical proofs strengthening the analysis procedures, and includes algorithms used in NoC design and synthesis. In addition, it considers other upcoming NoC issues, such as low-power NoC design, signal integrity issues, NoC testing, reconfiguration, synthesis, and 3-D NoC design. This text comprises 12 chapters and covers: The evolution of NoC from SoC—its research and developmental challengesNoC protocols, elaborating flow control, available network topologies, routing mechanisms, fault tolerance, quality-of-service support, and the design of network interfacesThe router design strategies followed in NoCsThe evaluation mechanism of NoC architecturesThe application mapping strategies followed in NoCs Low-power design techniques specifically followed in NoCsThe signal integrity and reliability issues of NoCThe details of NoC testing strategies reported so farThe problem of synthesizing application-specific NoCsReconfigurable NoC design issuesDirection of future research and development in the field of NoC Network-on-Chip: The Next Generation of System-on-Chip Integrationcovers the basic topics, technology, and future trends relevant to NoC-based design, and can be used by engineers, students, and researchers and other industry professionals interested in computer architecture, embedded systems, and parallel/distributed systems.

    Produktinformation

    • Utgivningsdatum:2017-07-26
    • Mått:156 x 234 x undefined mm
    • Vikt:544 g
    • Format:Häftad
    • Språk:Engelska
    • Antal sidor:388
    • Förlag:Taylor & Francis Ltd
    • ISBN:9781138749351

    Utforska kategorier

    • Elektronik och kommunikationer inom Naturvetenskap och teknik
    • Informationsteknik: allmänt inom Data och IT

    Mer om författaren

    Santanu Kundu received his BTech in instrumentation engineering from Vidyasagar University, Medinipur, West Bengal, India, in 2002. He received his MTech in instrumentation and electronics engineering from Jadavpur University, Kolkata, West Bengal, India, in 2006. Immediately after that he joined the electronics and electrical communication engineering department at the Indian Institute of Technology, Kharagpur, West Bengal, India. He received his PhD in 2011. His research interests include network-on-chip architecture design in 2D and 3D environments, performance and cost evaluation, signal integrity in nanometer regime, fault-tolerant schemes, and power–performance–reliability trade-off. He is currently a system-on-chip (SoC) design engineer at LSI India R&D Pvt. Ltd., Bangalore, Karnataka, India. Santanu Chattopadhyayreceived his BE in computer science and technology from Calcutta University (BE College), Kolkata, West Bengal, in 1990. In 1992 and 1996, he received his MTech in computer and information technology and PhD in computer science and engineering, respectively, both from the Indian Institute of Technology (IIT), Kharagpur, West Bengal, India. He is currently a professor in the electronics and electrical communication engineering department at the IIT, Kharagpur. He has contributed to more than 100 publications in refereed international journals and conferences. He has also coauthored and written several textbooks, and is a member of the editorial board of the journal IET Circuits, Devices and Systems.

    Recensioner i media

    "What makes this book special as compared to the current literature in the field is that it provides a complete picture of NoC architectures. In fact, current books in the context of NoCs are usually specific and presuppose a basic knowledge of NoC architectures. Conversely, this book provides a complete guide for both unskilled readers and researchers working in the area, to acquire not only the basic concepts but also the advanced techniques for improving power, cost and performance metrics of the on-chip communication system."—Maurizio Palesi, Kore University, Italy

    Innehållsförteckning

    • Introduction. Interconnection Networks in Network-on-Chip. Architecture Design of Network-on-Chip. Evaluation of Network-on-Chip Architectures. Application Mapping on Network-on-Chip. Low-Power Techniques for Network-on-Chip. Signal Integrity and Reliability of Network-on-Chip. Testing of Network-on- Chip Architectures. Application-Specific Network-on-Chip Synthesis. Reconfigurable Network-on-Chip Design. Three-Dimensional Integration of Network-on-Chip. Conclusions and Future Trends. References. Index.