Embedded Systems Specification and Design Languages

Selected Contributions from FDL’07

AvEugenio Villar

Inbunden, Engelska, 2008

Del i serien Lecture Notes in Electrical Engineering

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Beskrivning

FDL is the most important European and, probably, worldwide forum to present research results, to exchange experiences, and to learn about new trends in the application of specification and design languages and the associated design and modeling methods and tools for complex, heterogeneous HW/SW embedded systems.

Produktinformation

Utgivningsdatum:2008-05-13
Mått:155 x 235 x 21 mm
Vikt:544 g
Format:Inbunden
Språk:Engelska
Serie:Lecture Notes in Electrical Engineering
Antal sidor:275
Upplaga:2008
Förlag:Springer-Verlag New York Inc.
ISBN:9781402082962

Utforska kategorier

Energiteknik inom Naturvetenskap och teknik

Innehållsförteckning

C/C++ Based System Design.- How Different Are Esterel and SystemC.- Timed Asynchronous Circuits Modeling and Validation Using SystemC.- On Construction of Cycle Approximate Bus TLMs.- Combinatorial Dependencies in Transaction Level Models.- An Integrated SystemC Debugging Environment.- Measuring the Quality of a SystemC Testbench by Using Code Coverage Techniques.- SystemC-Based Simulation of the MICAS Architecture.- Analog, Mixed-Signal, and Heterogeneous System Design.- Heterogeneous Specification with HetSC and SystemC-AMS: Widening the Support of MoCs in SystemC.- An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations.- Mixed-Level Modeling Using Configurable MOS Transistor Models.- UML-Based System Specification and Design.- Modeling AADL Data Communications with UML MARTE.- Software Real-Time Resource Modeling.- Model Transformations from a Data Parallel Formalism Towards Synchronous Languages.- UML and SystemC – A Comparison and Mapping Rules for Automatic Code Generation.- An Enhanced SystemC UML Profile for Modeling at Transaction-Level.- SC2 StateCharts to SystemC: Automatic Executable Models Generation.- Formalisms for Property-Driven Design.- Asynchronous On-Line Monitoring of Logical and Temporal Assertions.- Transactor-Based Formal Verification of Real-Time Embedded Systems.- A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set.