Daniel Große is a Senior Researcher at University of Bremen and at the German Research Center for Artificial Intelligence (DFKI) since 2015. He received the Dr.-Ing. degree in Computer Science from the University of Bremen in 2008. He remained as a Post-Doctoral Researcher with the Group of Computer Architecture, University of Bremen. In 2010, he was a substitute Professor for computer architecture with Albert-Ludwigs University, Freiburg, Germany. From 2013 to 2014, he was the CEO of the EDA start-up solvertec focusing on automated debugging techniques. Since 2015, he has been a Senior Researcher with the University of Bremen and DFKI, and also the Scientific Coordinator of the Graduate School of System Design, funded within the German Excellence Initiative. His current research interests include verification, virtual prototyping, debugging, and synthesis. He published over 100 papers in peer-reviewed journals and conferences in the above areas. Dr. Große served in program committees of numerous conferences, including DAC, ICCAD, DATE, CODES+ISSS, FDL, and MEMOCODE.Sara Vinco is currently Assistant Professor in the Department of Control and Computer Engineering (DAUIN) in Politecnico di Torino. She received her Ph.D. in Computer Science at the University of Verona (Italy) in 2013. Her main research interests are energy efficient electronic design automation and techniques for simulation and validation of heterogeneous embedded systems. She currently is associate editor for IEEE Transactions on Circuits and Systems II: Express Briefs, and she has served in program committees for a number of conferences including DATE, ICCD, FDL, and ICECS. Hiren Patel is an Associate Professor in the Electrical and Computer Engineering department at the University of Waterloo. He was a post-doctoral scholar at the University of California, Berkeley from 2007 to 2009.  He received his Ph.D. in Computer Engineering from Virginia Tech. in 2007.  His research interests are in embedded software and hardware systems.  This includes models of computation, real-time systems, computer architecture, and system-level design.  He currently serves as a senior associate editor for ACM Transactions on Embedded Computing, and he has served in program committees for numerous conferences including DAC, ICCAD, RTAS, RTSS, FDL, CASES, and MEMOCODE.

• 1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces.- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach.- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers.- 4. Language and Hardware Acceleration Backend for Graph Processing.- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction.- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.

Daniel Große is a Senior Researcher at University of Bremen and at the German Research Center for Artificial Intelligence (DFKI) since 2015. He received the Dr.-Ing. degree in Computer Science from the University of Bremen in 2008. He remained as a Post-Doctoral Researcher with the Group of Computer Architecture, University of Bremen. In 2010, he was a substitute Professor for computer architecture with Albert-Ludwigs University, Freiburg, Germany. From 2013 to 2014, he was the CEO of the EDA start-up solvertec focusing on automated debugging techniques. Since 2015, he has been a Senior Researcher with the University of Bremen and DFKI, and also the Scientific Coordinator of the Graduate School of System Design, funded within the German Excellence Initiative. His current research interests include verification, virtual prototyping, debugging, and synthesis. He published over 100 papers in peer-reviewed journals and conferences in the above areas. Dr. Große served in program committees of numerous conferences, including DAC, ICCAD, DATE, CODES+ISSS, FDL, and MEMOCODE.Sara Vinco is currently Assistant Professor in the Department of Control and Computer Engineering (DAUIN) in Politecnico di Torino. She received her Ph.D. in Computer Science at the University of Verona (Italy) in 2013. Her main research interests are energy efficient electronic design automation and techniques for simulation and validation of heterogeneous embedded systems. She currently is associate editor for IEEE Transactions on Circuits and Systems II: Express Briefs, and she has served in program committees for a number of conferences including DATE, ICCD, FDL, and ICECS. Hiren Patel is an Associate Professor in the Electrical and Computer Engineering department at the University of Waterloo. He was a post-doctoral scholar at the University of California, Berkeley from 2007 to 2009.  He received his Ph.D. in Computer Engineering from Virginia Tech. in 2007.  His research interests are in embedded software and hardware systems.  This includes models of computation, real-time systems, computer architecture, and system-level design.  He currently serves as a senior associate editor for ACM Transactions on Embedded Computing, and he has served in program committees for numerous conferences including DAC, ICCAD, RTAS, RTSS, FDL, CASES, and MEMOCODE.

• 1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces.- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach.- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers.- 4. Language and Hardware Acceleration Backend for Graph Processing.- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction.- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.

Daniel Große is a Senior Researcher at University of Bremen and at the German Research Center for Artificial Intelligence (DFKI) since 2015. He received the Dr.-Ing. degree in Computer Science from the University of Bremen in 2008. He remained as a Post-Doctoral Researcher with the Group of Computer Architecture, University of Bremen. In 2010, he was a substitute Professor for computer architecture with Albert-Ludwigs University, Freiburg, Germany. From 2013 to 2014, he was the CEO of the EDA start-up solvertec focusing on automated debugging techniques. Since 2015, he has been a Senior Researcher with the University of Bremen and DFKI, and also the Scientific Coordinator of the Graduate School of System Design, funded within the German Excellence Initiative. His current research interests include verification, virtual prototyping, debugging, and synthesis. He published over 100 papers in peer-reviewed journals and conferences in the above areas. Dr. Große served in program committees of numerous conferences, including DAC, ICCAD, DATE, CODES+ISSS, FDL, and MEMOCODE.Sara Vinco is currently Assistant Professor in the Department of Control and Computer Engineering (DAUIN) in Politecnico di Torino. She received her Ph.D. in Computer Science at the University of Verona (Italy) in 2013. Her main research interests are energy efficient electronic design automation and techniques for simulation and validation of heterogeneous embedded systems. She currently is associate editor for IEEE Transactions on Circuits and Systems II: Express Briefs, and she has served in program committees for a number of conferences including DATE, ICCD, FDL, and ICECS. Hiren Patel is an Associate Professor in the Electrical and Computer Engineering department at the University of Waterloo. He was a post-doctoral scholar at the University of California, Berkeley from 2007 to 2009.  He received his Ph.D. in Computer Engineering from Virginia Tech. in 2007.  His research interests are in embedded software and hardware systems.  This includes models of computation, real-time systems, computer architecture, and system-level design.  He currently serves as a senior associate editor for ACM Transactions on Embedded Computing, and he has served in program committees for numerous conferences including DAC, ICCAD, RTAS, RTSS, FDL, CASES, and MEMOCODE.

• 1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces.- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach.- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers.- 4. Language and Hardware Acceleration Backend for Graph Processing.- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction.- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.