Dr. Jie Li received his Bachelor and Ph.D. degrees in Engineering from Massey University, Auckland, New Zealand in 2007 and 2012, respectively. He subsequently worked on mixed signal integrated circuit designs, wireless and optical device integrations, Internet of Things (IoT) systems and applications. In April 2012, he joined the Centre for Energy-Efficient Telecommunications (CEET), a Bell Labs research center based at the University of Melbourne as a Research Fellow, where he develops circuits and systems for low-energy fiber access networks and wireless networks. Dr. Li is currently an honorary fellow of the Department of Electrical and Electronic Engineering at the University of Melbourne, and the co-founder of Medrivs Ltd., a technology company that delivers research and solutions for medical devices and applications. Dr. Li holds three international patents and has authored or co-authored more than 20 international journal and conference articles. He has served on the technical program committees of several international conference and journals. A. Ravi Sankar received his B.E. degree in Electrical and Electronics Engineering from the University of Madras, his M.E. degree in Very-large-scale integration (VLSI) Design from the Department of Electronics and Communication Engineering, PSG College of Technology, Bharathiar University and his Ph.D. degree in Electronics and Electrical Communication Engineering from the Indian Institute of Technology Kharagpur (IIT Kharagpur). He worked as a project scientist at the Advanced Technology Development Centre, IIT Kharagpur for a period of 14 months, where he focused on Indian Space Research Organization (ISRO)-sponsored projects and was involved in the design, fabrication and testing of microelectromechanical system (MEMS) sensors. From 2009 to 2011, he worked as an Associate Professor at the Department of Electronics and Communication Engineering, Karunya University,Coimbatore. Since June 2011, he has been working as a Professor at the School of Electronics Engineering, VIT University, Chennai Campus. His research interests include MEMS and Microsystems, Silicon and Glass Micromachining, Microelectronics and VLSI Design and Nanosensors. He has published and presented more than 45 papers in national and international conferences and peer-reviewed journals.  P. Augusta Sophy received her Bachelor’s degree in Electronics and Communication Engineering from Government College of Engineering, Tamil Nadu, India in 1988. After spending several years in teaching, she obtained her Master’s degree with a specialization in ‘VLSI Design’ from Easwari Engineering College, affiliated to Anna University, Chennai, India in 2006. She then pursued research in low-power VLSI architectures for digital signal processing (DSP) algorithms and received her Ph.D. degree from Anna University in 2015. With 25 years of teaching experience at various polytechnics and Engineering Colleges, she is currently working at VIT University, Chennai. She has published more than 15 research papers in peer-reviewed journals. Her research interests include high-performance VLSI architectures for signal processing algorithms and arithmetic circuits, low-power VLSI and reconfigurable architectures.

• Front-End CMOS Circuit for Low Power Consumption.- A Preliminary Study of Oscillators, Phase and Frequency Detector and Charge Pump for Phase Locked Loop (PLL) Applications.- All Digital RF Transmitter with Highly Power Efficient Doherty Power Amplifier.- Adiabatic Techniques for Energy Efficient Barrel Shifter Design.- A 79Ghz CMOS LNA with Adaptive Biasing.- X-Band Phased-Array Transmitter in 180nm Sige Bicmos Technology with Stacked Power Amplifier.- Short Range Low Data Rate Pulsed UWB Transmitter.- A New High Speed Multiplier Based on Carry Look Ahead Adder and Compressor.- Real-Time Automatic Peaks and Onsets Detection of Photoplethysmographic Signals.- Survey on Design of Low Power CMOS Four Quadrant Analog Multiplier in Nano-Meter Scaling.- Designing 5t Embedded Dram Cell for Ultra Low Power Low Voltage Applications Based on Schmitt Trigger.- Design and Implementation of Multi-Bit Self-Checking Carry-Select Adder.- A Novel Adiabatic Logic for Low Power VLSI Circuit Design and Power Optimization Using Finfet.- Test Signal Generation for Detecting Faults On Mil-Std 1553 Bus.- Design of Ultra Low Voltage- Energy Efficient Hybrid Full Adder Circuit.- Mtcmos Based Soft Start Circuit for Low Leakage Led Driver with Minimum In-Rush Current.- Implementation of Dual-Hysteresis Mode Flip-Flop Multivibrator    Using Differential Voltage Current Conveyor.- High Performance Domino Logic Circuit Design By Contention Reduction.- Differential Power Analysis (Dpa) Resistant Cryptographic S-Box.- Implementation of Radix-2 Butterfly Using Distributed Arithmatic Algorithm (Daa).- An Area Efficient Design of Warped Filters.- Design of Arithmetic and Logical Unit (Alu) Using Subthreshold Adiabatic Logic for Low Power Application.- Design of Sample and Hold for High Speed Analog To Digital Converter.- Fpga Masked S-Box Implementation for Aes Engine.- Pipelined and Parallel Architecture of Reversible Watermarking for Grayscale Images.- Design and Verification of Amba Axi3 Protocol.- Design of Multi-Stage Cmos Ota for Low-Power and High Driving Capability.

Dr. Jie Li received his Bachelor and Ph.D. degrees in Engineering from Massey University, Auckland, New Zealand in 2007 and 2012, respectively. He subsequently worked on mixed signal integrated circuit designs, wireless and optical device integrations, Internet of Things (IoT) systems and applications. In April 2012, he joined the Centre for Energy-Efficient Telecommunications (CEET), a Bell Labs research center based at the University of Melbourne as a Research Fellow, where he develops circuits and systems for low-energy fiber access networks and wireless networks. Dr. Li is currently an honorary fellow of the Department of Electrical and Electronic Engineering at the University of Melbourne, and the co-founder of Medrivs Ltd., a technology company that delivers research and solutions for medical devices and applications. Dr. Li holds three international patents and has authored or co-authored more than 20 international journal and conference articles. He has served on the technical program committees of several international conference and journals. A. Ravi Sankar received his B.E. degree in Electrical and Electronics Engineering from the University of Madras, his M.E. degree in Very-large-scale integration (VLSI) Design from the Department of Electronics and Communication Engineering, PSG College of Technology, Bharathiar University and his Ph.D. degree in Electronics and Electrical Communication Engineering from the Indian Institute of Technology Kharagpur (IIT Kharagpur). He worked as a project scientist at the Advanced Technology Development Centre, IIT Kharagpur for a period of 14 months, where he focused on Indian Space Research Organization (ISRO)-sponsored projects and was involved in the design, fabrication and testing of microelectromechanical system (MEMS) sensors. From 2009 to 2011, he worked as an Associate Professor at the Department of Electronics and Communication Engineering, Karunya University,Coimbatore. Since June 2011, he has been working as a Professor at the School of Electronics Engineering, VIT University, Chennai Campus. His research interests include MEMS and Microsystems, Silicon and Glass Micromachining, Microelectronics and VLSI Design and Nanosensors. He has published and presented more than 45 papers in national and international conferences and peer-reviewed journals.  P. Augusta Sophy received her Bachelor’s degree in Electronics and Communication Engineering from Government College of Engineering, Tamil Nadu, India in 1988. After spending several years in teaching, she obtained her Master’s degree with a specialization in ‘VLSI Design’ from Easwari Engineering College, affiliated to Anna University, Chennai, India in 2006. She then pursued research in low-power VLSI architectures for digital signal processing (DSP) algorithms and received her Ph.D. degree from Anna University in 2015. With 25 years of teaching experience at various polytechnics and Engineering Colleges, she is currently working at VIT University, Chennai. She has published more than 15 research papers in peer-reviewed journals. Her research interests include high-performance VLSI architectures for signal processing algorithms and arithmetic circuits, low-power VLSI and reconfigurable architectures.

• Front-End CMOS Circuit for Low Power Consumption.- A Preliminary Study of Oscillators, Phase and Frequency Detector and Charge Pump for Phase Locked Loop (PLL) Applications.- All Digital RF Transmitter with Highly Power Efficient Doherty Power Amplifier.- Adiabatic Techniques for Energy Efficient Barrel Shifter Design.- A 79Ghz CMOS LNA with Adaptive Biasing.- X-Band Phased-Array Transmitter in 180nm Sige Bicmos Technology with Stacked Power Amplifier.- Short Range Low Data Rate Pulsed UWB Transmitter.- A New High Speed Multiplier Based on Carry Look Ahead Adder and Compressor.- Real-Time Automatic Peaks and Onsets Detection of Photoplethysmographic Signals.- Survey on Design of Low Power CMOS Four Quadrant Analog Multiplier in Nano-Meter Scaling.- Designing 5t Embedded Dram Cell for Ultra Low Power Low Voltage Applications Based on Schmitt Trigger.- Design and Implementation of Multi-Bit Self-Checking Carry-Select Adder.- A Novel Adiabatic Logic for Low Power VLSI Circuit Design and Power Optimization Using Finfet.- Test Signal Generation for Detecting Faults On Mil-Std 1553 Bus.- Design of Ultra Low Voltage- Energy Efficient Hybrid Full Adder Circuit.- Mtcmos Based Soft Start Circuit for Low Leakage Led Driver with Minimum In-Rush Current.- Implementation of Dual-Hysteresis Mode Flip-Flop Multivibrator    Using Differential Voltage Current Conveyor.- High Performance Domino Logic Circuit Design By Contention Reduction.- Differential Power Analysis (Dpa) Resistant Cryptographic S-Box.- Implementation of Radix-2 Butterfly Using Distributed Arithmatic Algorithm (Daa).- An Area Efficient Design of Warped Filters.- Design of Arithmetic and Logical Unit (Alu) Using Subthreshold Adiabatic Logic for Low Power Application.- Design of Sample and Hold for High Speed Analog To Digital Converter.- Fpga Masked S-Box Implementation for Aes Engine.- Pipelined and Parallel Architecture of Reversible Watermarking for Grayscale Images.- Design and Verification of Amba Axi3 Protocol.- Design of Multi-Stage Cmos Ota for Low-Power and High Driving Capability.