Anne Mignotte - Böcker

This book describes several methods and systems solving one of the highlighted problems within computer aided design, namely architectural and logic synthesis. The book emphasises the most recent technologies in high level synthesis, concentrating on applicative studies and practical constraints or criteria during synthesis. Logic and Architecture Synthesis concentrates on the practical problems involving automatic synthesis of designs. It is essential reading for researchers and CAD Managers working in this area.

This volume brings together a selection of the best papers from two international electronic design language conferences in 2001. The conferences are the Hardware Description Language Conference (HDLCon) in USA and the Forum on Design Languages (FDL), in Europe. The papers cover a range of topics, including: HDL specification and modelling languages, with results from standardisation process - from specialised languages such as VHDL and Verilog to general purpose languages such as C++ (SystemC, SpecC) and Java; analogue and mixed signal specification and design; system on chip, real time and embedded specifications; real-life experiences in using HDLs; and EDA vendors point of view describing future design tools that utilise HDLs, such as Web design environments, simulation, verification and synthesis tools. The results presented in these papers should help researchers and practising engineers keep abreast of developments in this rapidly evolving field.

This volume is the third in a series. It brings together a selection of the best papers from two international electronic design language conferences in 2001. The conferences are the Hardware Description Language Conference (HDLCon) in USA; the Forum on Design Languages (FDL), in Europe. The papers cover a range of topics, including: HDL specification and modelling languages including results from standardisation process: from specialised languages such as VHDL and Verilog to general purpose languages such as C++ (SystemC, SpecC) and Java; Analogue and mixed signal specification and design; System on chip, real time and embedded specifications; Real life experiences in using HDLs; and EDA vendors point of view describing future design tools that tilise HDLs, such as Web design environments, simulation, verification and synthesis tools. The results presented in these papers will help researchers and practising engineers to keep abreast of developments in this rapidly evolving field.

This two-volume set presents the proceedings of the Second International European Conference on Parallel Processing, EuroPar '96, held in Lyon, France, in August 1996.EuroPar '96 was organized in 14 workshops covering the whole spectrum of parallel processing. The comprehensive proceedings constitute a unique record of the state of the art in parallel processing research and development: the 224 papers included together with four invited papers were selected from a total of 383 submissions by authors from 40 countries; 554 referees were involved in the selection process and the index lists 521 contributing authors.