Cristina Silvano – författare
Visar alla böcker från författaren Cristina Silvano. Handla med fri frakt och snabb leverans.
22 produkter
22 produkter
E-bok
PDF, Engelska, 20071 527 kr
Läs direkt efter köp
LOW power design is playing an important role in today ultra-large scale integration (ULSI) design, particularly as we continue to double the number of transistors on a die every two years and increase the frequency of operation at fairly the same rate. Certainly, an important aspect of low power faces with mobile communications and it has a huge impact on our lives, as we are at the start-line of the proliferation of mobile PDA’s (Personal Digital Assistants), Wireless LAN and portable multi-media computing. All of these devices are shaping the way we will be interacting with our family, peers and workplace, thus requiring also a new and innovative low power design paradigm. Furthermore, low power design techniques are becoming paramount in high performance desktop, base-station and server applications, such as high-speed microprocessors, where excess in power dissipation can lead to a number of cooling, reliability and signal integrity concerns severely burdening the total industrialcost. Hence, low power design can be easily anticipated to further come into prominence as we move to next generation System-on-Chip and Network-on-Chip designs. This book is entirely devoted to disseminate the results of a long term research program between Politecnico di Milano (Italy) and STMic- electronics, in the field of architectural exploration and optimization techniques to designing low power embedded systems.
Inbunden, Engelska, 2003
1 363 kr
Skickas inom 10-15 vardagar
This text discusses the introduction of innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance Very Long Instruction Word (VLIW) microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations; this set of operations is statically scheduled to form a Very Long Instruction Word. The proposed estimation techniques are integrated into a set of tools operating at the instruction level and they are characterized by efficiency and accuracy. The aim is the definition of an overall power estimation framework, from a system-level perspective, where novel power optimization techniques can be evaluated. The proposed power optimization techniques are addressed to the micro-architectural as well as the system level. Two main optimization techniques have been proposed: the definition of register file write inhibition schemes that exploit the forwarding paths, and the definition of a design exploration framework for an efficient fine-tuning of the configurable modules of an embedded system.
Häftad, Engelska, 2011
1 323 kr
Skickas inom 10-15 vardagar
LOW power design is playing an important role in today ultra-large scale integration (ULSI) design, particularly as we continue to double the number of transistors on a die every two years and increase the frequency of operation at fairly the same rate. Certainly, an important aspect of low power faces with mobile communications and it has a huge impact on our lives, as we are at the start-line of the proliferation of mobile PDA’s (Personal Digital Assistants), Wireless LAN and portable multi-media computing. All of these devices are shaping the way we will be interacting with our family, peers and workplace, thus requiring also a new and innovative low power design paradigm. Furthermore, low power design techniques are becoming paramount in high performance desktop, base-station and server applications, such as high-speed microprocessors, where excess in power dissipation can lead to a number of cooling, reliability and signal integrity concerns severely burdening the total industrialcost. Hence, low power design can be easily anticipated to further come into prominence as we move to next generation System-on-Chip and Network-on-Chip designs. This book is entirely devoted to disseminate the results of a long term research program between Politecnico di Milano (Italy) and STMic- electronics, in the field of architectural exploration and optimization techniques to designing low power embedded systems.
Inbunden, Engelska, 2010
1 518 kr
Skickas inom 10-15 vardagar
In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
E-bok
PDF, Engelska, 20101 416 kr
Läs direkt efter köp
In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
Inbunden, Engelska, 2011
1 086 kr
Skickas inom 10-15 vardagar
This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives. It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc. Coverage focuses on the design of complex multimedia applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer’s goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.
E-bok
PDF, Engelska, 20111 416 kr
Läs direkt efter köp
This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives. It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc. Coverage focuses on the design of complex multimedia applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer’s goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.
Häftad, Engelska, 2014
1 086 kr
Skickas inom 10-15 vardagar
In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
Häftad, Engelska, 2014
1 318 kr
Skickas inom 10-15 vardagar
This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives. It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc. Coverage focuses on the design of complex multimedia applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer’s goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.
Del 14385 - Lecture Notes in Computer Science
Embedded Computer Systems: Architectures, Modeling, and Simulation
23rd International Conference, SAMOS 2023, Samos, Greece, July 2–6, 2023, Proceedings
Häftad, Engelska, 2023
1 346 kr
Skickas inom 10-15 vardagar
This book constitutes the proceedings of the 22st International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2021, which took place in July 2022 in Samos, Greece. The 11 full papers and 7 short papers presented in this volume were carefully reviewed and selected from 45 submissions. The conference covers a wide range of embedded systems design aspects, including machine learning accelerators, and power management and programmable dataflow systems.
E-bok
Engelska, 20231 785 kr
Läs direkt efter köp
This book constitutes the proceedings of the 22st International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2021, which took place in July 2022 in Samos, Greece. The 11 full papers and 7 short papers presented in this volume were carefully reviewed and selected from 45 submissions. The conference covers a wide range of embedded systems design aspects, including machine learning accelerators, and power management and programmable dataflow systems.
Inbunden, Engelska, 2015
549 kr
Skickas inom 10-15 vardagar
This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. · Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall;· Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point;· Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.
E-bok
PDF, Engelska, 2015712 kr
Läs direkt efter köp
This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips.
· Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall;
· Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point;
· Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.
Häftad, Engelska, 2016
549 kr
Skickas inom 10-15 vardagar
This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. · Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall;· Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point;· Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.
Häftad, Engelska, 2018
565 kr
Skickas inom 10-15 vardagar
This book explores break-through approaches to tackling and mitigating the well-known problems of compiler optimization using design space exploration and machine learning techniques. It demonstrates that not all the optimization passes are suitable for use within an optimization sequence and that, in fact, many of the available passes tend to counteract one another. After providing a comprehensive survey of currently available methodologies, including many experimental comparisons with state-of-the-art compiler frameworks, the book describes new approaches to solving the problem of selecting the best compiler optimizations and the phase-ordering problem, allowing readers to overcome the enormous complexity of choosing the right order of optimizations for each code segment in an application. As such, the book offers a valuable resource for a broad readership, including researchers interested in Computer Architecture, Electronic Design Automation and Machine Learning, as well as computer architects and compiler developers.
E-bok
Engelska, 2017717 kr
Läs direkt efter köp
This book explores break-through approaches to tackling and mitigating the well-known problems of compiler optimization using design space exploration and machine learning techniques. It demonstrates that not all the optimization passes are suitable for use within an optimization sequence and that, in fact, many of the available passes tend to counteract one another. After providing a comprehensive survey of currently available methodologies, including many experimental comparisons with state-of-the-art compiler frameworks, the book describes new approaches to solving the problem of selecting the best compiler optimizations and the phase-ordering problem, allowing readers to overcome the enormous complexity of choosing the right order of optimizations for each code segment in an application. As such, the book offers a valuable resource for a broad readership, including researchers interested in Computer Architecture, Electronic Design Automation and Machine Learning, as well as computer architects and compiler developers.
Häftad, Engelska, 2009
566 kr
Skickas inom 10-15 vardagar
TheSAMOSworkshopisaninternationalgatheringofhighlyquali?edresearchers from academia and industry, sharing ideas in a 3-day lively discussion on the quietandinspiringnorthernmountainsideoftheMediterraneanislandofSamos. The workshopmeeting is one of two co-locatedevents (the other event being the IC-SAMOS).Asatradition,theworkshopfeaturespresentationsinthemorning, while after lunch all kinds of informal discussions and nut-cracking gatherings take place. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved problems and in-depth topical reviews can be unleashed in the scienti?c arena. Consequently, the workshopprovidesthe participantswithanenvironmentwherecollaboration rather than competition is fostered. The SAMOS conference and workshop were established in 2001 by Stamatis Vassiliadis with the goals outlined above in mind, and located on Samos, one of the most beautiful islands of the Aegean.The rich historical and cultural environment of the island, coupled with the intimate atmosphereandthe slowpaceofasmallvillagebythe seainthe middle of the Greek summer, provide a very conducive environment where ideas can be exchanged and shared freely.
E-bok
PDF, Engelska, 2009734 kr
Läs direkt efter köp
Häftad, Engelska, 2011
566 kr
Skickas inom 10-15 vardagar
This book constitutes the refereed proceedings of the 24th International Conference on Architecture of Computing Systems, ARCS 2011, held in Lake Como, Italy, in February 2011. The 22 revised full papers presented in seven technical sessions were carefully reviewed and selected from 62 submissions. The papers are organized in topical sections on customization and application specific accelerators; multi/many-core architectures; adaptive system architectures; processor architectures; memory architectures optimization; organic and autonomic computing; network-on-chip architectures.
E-bok
PDF, Engelska, 2011708 kr
Läs direkt efter köp
This book constitutes the refereed proceedings of the 24th International Conference on Architecture of Computing Systems, ARCS 2011, held in Lake Como, Italy, in February 2011. The 22 revised full papers presented in seven technical sessions were carefully reviewed and selected from 62 submissions. The papers are organized in topical sections on customization and application specific accelerators; multi/many-core architectures; adaptive system architectures; processor architectures; memory architectures optimization; organic and autonomic computing; network-on-chip architectures.
Häftad, Engelska, 2019
565 kr
Skickas inom 10-15 vardagar
Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems.This 5th issue contains extended versions of papers by the best paper award candidates of IC-SAMOS 2009 and the SAMOS 2009 Workshop, colocated events of the 9th International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS 2009, held in Samos, Greece, in 2009. The 7 papers included in this volume were carefully reviewed and selected. The papers cover research on embedded processor hardware/software design and integration and present challenging research trends.
E-bok
Engelska, 2019708 kr
Läs direkt efter köp
Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems.This 5th issue contains extended versions of papers by the best paper award candidates of IC-SAMOS 2009 and the SAMOS 2009 Workshop, colocated events of the 9th International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS 2009, held in Samos, Greece, in 2009. The 7 papers included in this volume were carefully reviewed and selected. The papers cover research on embedded processor hardware/software design and integration and present challenging research trends.