Farimah Farahmandi – författare

This book describes a wide variety of System-on-Chip (SoC) security threats and vulnerabilities, as well as their sources, in each stage of a design life cycle.  The authors discuss a wide variety of state-of-the-art security verification and validation approaches such as formal methods and side-channel analysis, as well as simulation-based security and trust validation approaches.  This book provides a comprehensive reference for system on chip designers and verification and validation engineers interested in verifying security and trust of heterogeneous SoCs.

This book provides an overview of current hardware security problems and highlights how these issues can be efficiently addressed using computer-aided design (CAD) tools. Authors are from CAD developers, IP developers, SOC designers as well as SoC verification experts. Readers will gain a comprehensive understanding of SoC security vulnerabilities and how to overcome them, through an efficient combination of proactive countermeasures and a wide variety of CAD solutions.

This book demonstrates the breadth and depth of IP protection through logic locking, considering both attacker/adversary and defender/designer perspectives. The authors draw a semi-chronological picture of the evolution of logic locking during the last decade, gathering and describing all the DO’s and DON’Ts in this approach. They describe simple-to-follow scenarios and guide readers to navigate/identify threat models and design/evaluation flow for further studies. Readers will gain a comprehensive understanding of all fundamentals of logic locking.  

This book provides a look into the future of hardware and microelectronics security, with an emphasis on potential directions in security-aware design, security verification and validation, building trusted execution environments, and physical assurance. The book emphasizes some critical questions that must be answered in the domain of hardware and microelectronics security in the next 5-10 years: (i) The notion of security must be migrated from IP-level to system-level; (ii) What would be the future of IP and IC protection against emerging threats; (iii) How security solutions could be migrated/expanded from SoC-level to SiP-level; (iv) the advances in power side-channel analysis with emphasis on post-quantum cryptography algorithms; (v) how to enable digital twin for secure semiconductor lifecycle management; and (vi) how physical assurance will look like with considerations of emerging technologies. The main aim of this book is to serve as a comprehensive and concise roadmap for new learners and educators navigating the evolving research directions in the domain of hardware and microelectronic securities. Overall, throughout 11 chapters, the book provides numerous frameworks, countermeasures, security evaluations, and roadmaps for the future of hardware security.