Hannu Tenhunen – författare

Smart grid is a new generation of power grids that is expected to enhance its reliability and reduce carbon footprint by integrating distributed resources. Microgrid technology allows the integration of renewable energies, which come in three modes: AC, DC, or hybrid. The increasing number of DC loads, the need to reduce power loss in converting DC power to AC, and the existence of DC storage units have favored the adoption of DC microgrids. The electrification of the transportation sector has further supported the adoption of DC microgrids. A DC microgrid system comprises renewable resources, DC storage elements, DC loads, and intelligent electrical devices. It has gained interest due to its efficiency, scalability, and cost-effectiveness. DC microgrids play a crucial role in powering diverse applications such as data centers, residential areas, base stations, and electric vehicle charging stations.This book covers the design, control, and management of DC microgrids in both islanded and grid-connected modes. It focuses on ICT infrastructure, security, sensors, embedded systems, machine learning algorithms, edge/fog computing, and the socio-economic impact.

This text presents a variety of topics, problems and approaches with the common theme to systematically organize the on-chip communication in the form of a regular, shared communication network on chip, a "NoC" for short. As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. This book summarizes the state of the art of these efforts and discusses the major issues from the physical integration to architecture to operating systems and application interfaces. It also provides a guideline and vision about the direction this field is moving to. Moreover, the book outlines the consequences of adopting design platforms based on packet switched network.The consequences may in fact be far reaching because many of the topics of distributed systems, distributed real-time systems, fault tolerant systems, parallel computer architecture, parallel programming as well as traditional system-on-chip issues will appear relevant but within the constraints of a single chip VLSI implementation. The book is organized in three parts. The first deals with system design and methodology issues. The second presents problems and solutions concerning the hardware and the basic communication infrastructure. Finally, the third part covers operating system, embedded software and application. However, communication from the physical to the application level is a central theme throughout the book.

As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. This book summarizes the state of the art of these efforts and discusses the major issues from the physical integration to architecture to operating systems and application interfaces. It also provides a guideline and vision about the direction this field is moving to. Moreover, the book outlines the consequences of adopting design platforms based on packet switched network. The consequences may in fact be far reaching because many of the topics of distributed systems, distributed real-time systems, fault tolerant systems, parallel computer architecture, parallel programming as well as traditional system-on-chip issues will appear relevant but within the constraints of a single chip VLSI implementation.

This book presents the state-of-the art of one of the main concerns with microprocessors today, a phenomenon known as "dark silicon".  Readers will learn how power constraints (both leakage and dynamic power) limit the extent to which large portions of a chip can be powered up at a given time, i.e. how much actual performance and functionality the microprocessor can provide. The authors describe their research toward the future of microprocessor development in the dark silicon era, covering a variety of important aspects of dark silicon-aware architectures including design, management, reliability, and test.  Readers will benefit from specific recommendations for mitigating the dark silicon phenomenon, including energy-efficient, dedicated solutions and technologies to maximize the utilization and reliability of microprocessors.

This book presents the state-of-the art of one of the main concerns with microprocessors today, a phenomenon known as "dark silicon".