Shimeng Yu – författare

This book covers semiconductor memory technologies from device bit-cell structures to memory array design with an emphasis on recent industry scaling trends and cutting-edge technologies. The first part of the book discusses the mainstream semiconductor memory technologies. The second part of the book discusses the emerging memory candidates that may have the potential to change the memory hierarchy, and surveys new applications of memory technologies for machine/deep learning applications. This book is intended for graduate students in electrical and computer engineering programs and researchers or industry professionals in semiconductors and microelectronics. Explains the design of basic memory bit-cells including 6-transistor SRAM, 1-transistor-1-capacitor DRAM, and floating gate/charge trap FLASH transistor Examines the design of the peripheral circuits including the sense amplifier and array-level organization for the memory array Examines industry trends of memory technologies such as FinFET based SRAM, High-Bandwidth-Memory (HBM), 3D NAND Flash, and 3D X-point array Discusses the prospects and challenges of emerging memory technologies such as PCM, RRAM, STT-MRAM/SOT-MRAM and FeRAM/FeFET Explores the new applications such as in-memory computing for AI hardware acceleration.

This book covers semiconductor memory technologies from device bit-cell structures to memory array design with an emphasis on recent industry scaling trends and cutting-edge technologies. The first part of the book discusses the mainstream semiconductor memory technologies. The second part of the book discusses the emerging memory candidates that may have the potential to change the memory hierarchy, and surveys new applications of memory technologies for machine/deep learning applications. This book is intended for graduate students in electrical and computer engineering programs and researchers or industry professionals in semiconductors and microelectronics. Explains the design of basic memory bit-cells including 6-transistor SRAM, 1-transistor-1-capacitor DRAM, and floating gate/charge trap FLASH transistor Examines the design of the peripheral circuits including the sense amplifier and array-level organization for the memory array Examines industry trends of memory technologies such as FinFET based SRAM, High-Bandwidth-Memory (HBM), 3D NAND Flash, and 3D X-point array Discusses the prospects and challenges of emerging memory technologies such as PCM, RRAM, STT-MRAM/SOT-MRAM and FeRAM/FeFET Explores the new applications such as in-memory computing for AI hardware acceleration.

State-of-the-art RRAM device performances, characterization, and modeling techniques are summarized, and the design considerations of the RRAM integration to large-scale array with peripheral circuits are discussed.

This book summarizes the recent breakthroughs in hardware implementation of neuro-inspired computing using resistive synaptic devices. The authors describe how two-terminal solid-state resistive memories can emulate synaptic weights in a neural network. Readers will benefit from state-of-the-art summaries of resistive synaptic devices, from the individual cell characteristics to the large-scale array integration. This book also discusses peripheral neuron circuits design challenges and design strategies. Finally, the authors describe the impact of device non-ideal properties (e.g. noise, variation, yield) and their impact on the learning performance at the system-level, using a device-algorithm co-design methodology.