Sneh Saurabh – författare

Chip designing is a complex task that requires an in-depth understanding of VLSI design flow, skills to employ sophisticated design tools, and keeping pace with the bleeding-edge semiconductor technologies. This lucid textbook is focused on fulfilling these requirements for students, as well as a refresher for professionals in the industry. It helps the user develop a holistic view of the design flow through a well-sequenced set of chapters on logic synthesis, verification, physical design, and testing. Illustrations and pictorial representations have been used liberally to simplify the explanation. Additionally, each chapter has a set of activities that can be performed using freely available tools and provide hands-on experience with the design tools. Review questions and problems are given at the end of each chapter to revise the concepts. Recent trends and references are listed at the end of each chapter for further reading.

During the last decade, there has been a great deal of interest in TFETs. To the best authors’ knowledge, no book on TFETs currently exists. The proposed book provides readers with fundamental understanding of the TFETs. It explains the interesting characteristics of the TFETs, pointing to their strengths and weaknesses, and describes the novel techniques that can be employed to overcome these weaknesses and improve their characteristics. Different tradeoffs that can be made in designing TFETs have also been highlighted. Further, the book provides simulation example files of TFETs that could be run using a commercial device simulator.