Arun Samuel T.S received a B.E degree in Electronics and Communication Engineering from Syed Ammal Engineering College (2004) and M.E degree in Computer and communication engineering from the National Engineering College (2006). He has been awarded a Ph.D. in Nanoelectronic Devices (2014) from Thiagarajar College of Engineering, Tamilnadu, India, under Anna University Chennai. He is currently an Associate Professor at the National Engineering College, Kovilpatti, India. He is a lifetime member of the Institute of Engineering (IE), India, and a member of IEEE. His research interest includes Modelling and Simulation of Multigate transistors and Tunnel Field-effect Transistors.Professor Young Suh Song is an Assistant Professor in the Department of Computer Science (CS) at the Korea Military Academy. His current research interests have included semiconductor reliability (self-heating effect and retention characteristics), AI semiconductor, Machine Learning (ML) for demographics and economics, NAND Flash and NOR Flash, low-temperature logic device for CPU, low power logic device (Tunnel FET, TFET) for cell phone and laptop, and germanium (Ge) based logic device (2030 ~ 2050) which is one of the promising candidates for replacing current silicon (Si) based CPU technology. Dr. Shubham Tayal is an Assistant Professor in the Department of Electronics and Communication Engineering at SR University, Warangal, India. He has more than 6 Years of academic/research experience teaching at the UG and PG levels. He has received his Ph.D. in Microelectronics & VLSI Design from the National Institute of Technology, Kurukshetra, M.Tech (VLSI Design) from YMCA University of Science and Technology, Faridabad, and B.Tech (Electronics and Communication Engineering) from MDU, Rohtak. He is a recipient of the Green ThinkerZ International Distinguished Young Researcher Award 2020. His research interests include simulation and modeling of Multi-gate semiconductor devices, Device-Circuit co-design in digital/analog domain, machine learning, and IoT. P.Vimala received her B.E and M.E degrees, both in electronics and communication engineering from Anna University, Chennai. She completed her Ph.D. degree in Semiconductor device modeling and simulation at Anna University, Chennai in 2014. She is currently an Associate Professor at Dayananda Sagar College of Engineering, Bangalore, India. She has 100+ publications including 47 indexed journals and 30+ indexed conferences, 1 patent, and 5 book chapters. She is a Senior Member of IEEE, a Fellow of IETE, a Life Member of ISTE, and a member of IEI. Her research interests focused on the Modeling of Nanoscale semiconductor device modeling and Simulation using both Sentaurus and Atlas TCAD Simulation tool. Shiromani Balmukund Rahi received B.Sc. (Physics, Chemistry & Mathematics) in 2002, M.Sc. (Electronics) from Deen Dyal Upadhyaya Gorakhpur University, Gorakhpur in 2005, GATE (2009), M. Tech. (Microelectronics) from Panjab University Chandigarh in 2011 and Doctorate of Philosophy in 2018 from Indian Institute of Technology, Kanpur, India. His interests include the development of IoTs for smart applications for the development of ultra-low-power devices such as Tunnel FETs, NC TFET Negative Capacitance FETs, Nanosheet.

• Chapter 1. Challenges of Conventional Cmos Technology in Perspective of Low Power ApplicationsChapter 2. Basic Science and Development of Subthreshold Swing TechnologyChapter 3. Historical Development of MOS technology to Tunnel FETsChapter 4. Modeling of Gate Engineered TFETs: Challenges and OpportunitiesChapter 5. Modeling of Gate Engineered TFET: challenges and Opportunities.Chapter 6. Evolution of Heterojunction Tunnel Field Effect Transistor and its AdvantagesChapter 7. Analog / RF performance analysis of TFET deviceChapter 8. DC Analysis and Analog/HF Performances of GAA-TFET with Dielectric PocketChapter 9. Investigation on Ambipolar Current Suppression in Tunnel FETsChapter 10. Analysis of Channel Doping Variation on Transfer Characteristics to High Frequency performance of F-TFETChapter 11. Design of Nanotube TFET BiosensorChapter 12. TFET-based Memory Cell Design with Top-down ApproachChapter 13. Designing of nonvolatile memories utilizing Tunnel Field Effect TransistorChapter 14. TFET-based Universal Chapter 15. TFET-based Level Shifter Circuits for Low Power Applications

Arun Samuel T.S received a B.E degree in Electronics and Communication Engineering from Syed Ammal Engineering College (2004) and M.E degree in Computer and communication engineering from the National Engineering College (2006). He has been awarded a Ph.D. in Nanoelectronic Devices (2014) from Thiagarajar College of Engineering, Tamilnadu, India, under Anna University Chennai. He is currently an Associate Professor at the National Engineering College, Kovilpatti, India. He is a lifetime member of the Institute of Engineering (IE), India, and a member of IEEE. His research interest includes Modelling and Simulation of Multigate transistors and Tunnel Field-effect Transistors.Professor Young Suh Song is an Assistant Professor in the Department of Computer Science (CS) at the Korea Military Academy. His current research interests have included semiconductor reliability (self-heating effect and retention characteristics), AI semiconductor, Machine Learning (ML) for demographics and economics, NAND Flash and NOR Flash, low-temperature logic device for CPU, low power logic device (Tunnel FET, TFET) for cell phone and laptop, and germanium (Ge) based logic device (2030 ~ 2050) which is one of the promising candidates for replacing current silicon (Si) based CPU technology. Dr. Shubham Tayal is an Assistant Professor in the Department of Electronics and Communication Engineering at SR University, Warangal, India. He has more than 6 Years of academic/research experience teaching at the UG and PG levels. He has received his Ph.D. in Microelectronics & VLSI Design from the National Institute of Technology, Kurukshetra, M.Tech (VLSI Design) from YMCA University of Science and Technology, Faridabad, and B.Tech (Electronics and Communication Engineering) from MDU, Rohtak. He is a recipient of the Green ThinkerZ International Distinguished Young Researcher Award 2020. His research interests include simulation and modeling of Multi-gate semiconductor devices, Device-Circuit co-design in digital/analog domain, machine learning, and IoT. P.Vimala received her B.E and M.E degrees, both in electronics and communication engineering from Anna University, Chennai. She completed her Ph.D. degree in Semiconductor device modeling and simulation at Anna University, Chennai in 2014. She is currently an Associate Professor at Dayananda Sagar College of Engineering, Bangalore, India. She has 100+ publications including 47 indexed journals and 30+ indexed conferences, 1 patent, and 5 book chapters. She is a Senior Member of IEEE, a Fellow of IETE, a Life Member of ISTE, and a member of IEI. Her research interests focused on the Modeling of Nanoscale semiconductor device modeling and Simulation using both Sentaurus and Atlas TCAD Simulation tool. Shiromani Balmukund Rahi received B.Sc. (Physics, Chemistry & Mathematics) in 2002, M.Sc. (Electronics) from Deen Dyal Upadhyaya Gorakhpur University, Gorakhpur in 2005, GATE (2009), M. Tech. (Microelectronics) from Panjab University Chandigarh in 2011 and Doctorate of Philosophy in 2018 from Indian Institute of Technology, Kanpur, India. His interests include the development of IoTs for smart applications for the development of ultra-low-power devices such as Tunnel FETs, NC TFET Negative Capacitance FETs, Nanosheet.

• Chapter 1. Challenges of Conventional Cmos Technology in Perspective of Low Power ApplicationsChapter 2. Basic Science and Development of Subthreshold Swing TechnologyChapter 3. Historical Development of MOS technology to Tunnel FETsChapter 4. Modeling of Gate Engineered TFETs: Challenges and OpportunitiesChapter 5. Modeling of Gate Engineered TFET: challenges and Opportunities.Chapter 6. Evolution of Heterojunction Tunnel Field Effect Transistor and its AdvantagesChapter 7. Analog / RF performance analysis of TFET deviceChapter 8. DC Analysis and Analog/HF Performances of GAA-TFET with Dielectric PocketChapter 9. Investigation on Ambipolar Current Suppression in Tunnel FETsChapter 10. Analysis of Channel Doping Variation on Transfer Characteristics to High Frequency performance of F-TFETChapter 11. Design of Nanotube TFET BiosensorChapter 12. TFET-based Memory Cell Design with Top-down ApproachChapter 13. Designing of nonvolatile memories utilizing Tunnel Field Effect TransistorChapter 14. TFET-based Universal Chapter 15. TFET-based Level Shifter Circuits for Low Power Applications

Arun Samuel T.S received a B.E degree in Electronics and Communication Engineering from Syed Ammal Engineering College (2004) and M.E degree in Computer and communication engineering from the National Engineering College (2006). He has been awarded a Ph.D. in Nanoelectronic Devices (2014) from Thiagarajar College of Engineering, Tamilnadu, India, under Anna University Chennai. He is currently an Associate Professor at the National Engineering College, Kovilpatti, India. He is a lifetime member of the Institute of Engineering (IE), India, and a member of IEEE. His research interest includes Modelling and Simulation of Multigate transistors and Tunnel Field-effect Transistors.Professor Young Suh Song is an Assistant Professor in the Department of Computer Science (CS) at the Korea Military Academy. His current research interests have included semiconductor reliability (self-heating effect and retention characteristics), AI semiconductor, Machine Learning (ML) for demographics and economics, NAND Flash and NOR Flash, low-temperature logic device for CPU, low power logic device (Tunnel FET, TFET) for cell phone and laptop, and germanium (Ge) based logic device (2030 ~ 2050) which is one of the promising candidates for replacing current silicon (Si) based CPU technology. Dr. Shubham Tayal is an Assistant Professor in the Department of Electronics and Communication Engineering at SR University, Warangal, India. He has more than 6 Years of academic/research experience teaching at the UG and PG levels. He has received his Ph.D. in Microelectronics & VLSI Design from the National Institute of Technology, Kurukshetra, M.Tech (VLSI Design) from YMCA University of Science and Technology, Faridabad, and B.Tech (Electronics and Communication Engineering) from MDU, Rohtak. He is a recipient of the Green ThinkerZ International Distinguished Young Researcher Award 2020. His research interests include simulation and modeling of Multi-gate semiconductor devices, Device-Circuit co-design in digital/analog domain, machine learning, and IoT. P.Vimala received her B.E and M.E degrees, both in electronics and communication engineering from Anna University, Chennai. She completed her Ph.D. degree in Semiconductor device modeling and simulation at Anna University, Chennai in 2014. She is currently an Associate Professor at Dayananda Sagar College of Engineering, Bangalore, India. She has 100+ publications including 47 indexed journals and 30+ indexed conferences, 1 patent, and 5 book chapters. She is a Senior Member of IEEE, a Fellow of IETE, a Life Member of ISTE, and a member of IEI. Her research interests focused on the Modeling of Nanoscale semiconductor device modeling and Simulation using both Sentaurus and Atlas TCAD Simulation tool. Shiromani Balmukund Rahi received B.Sc. (Physics, Chemistry & Mathematics) in 2002, M.Sc. (Electronics) from Deen Dyal Upadhyaya Gorakhpur University, Gorakhpur in 2005, GATE (2009), M. Tech. (Microelectronics) from Panjab University Chandigarh in 2011 and Doctorate of Philosophy in 2018 from Indian Institute of Technology, Kanpur, India. His interests include the development of IoTs for smart applications for the development of ultra-low-power devices such as Tunnel FETs, NC TFET Negative Capacitance FETs, Nanosheet.

• Chapter 1. Challenges of Conventional Cmos Technology in Perspective of Low Power ApplicationsChapter 2. Basic Science and Development of Subthreshold Swing TechnologyChapter 3. Historical Development of MOS technology to Tunnel FETsChapter 4. Modeling of Gate Engineered TFETs: Challenges and OpportunitiesChapter 5. Modeling of Gate Engineered TFET: challenges and Opportunities.Chapter 6. Evolution of Heterojunction Tunnel Field Effect Transistor and its AdvantagesChapter 7. Analog / RF performance analysis of TFET deviceChapter 8. DC Analysis and Analog/HF Performances of GAA-TFET with Dielectric PocketChapter 9. Investigation on Ambipolar Current Suppression in Tunnel FETsChapter 10. Analysis of Channel Doping Variation on Transfer Characteristics to High Frequency performance of F-TFETChapter 11. Design of Nanotube TFET BiosensorChapter 12. TFET-based Memory Cell Design with Top-down ApproachChapter 13. Designing of nonvolatile memories utilizing Tunnel Field Effect TransistorChapter 14. TFET-based Universal Chapter 15. TFET-based Level Shifter Circuits for Low Power Applications