Many-Core Computing

Bashir M. Al-Hashimi is an international leader in the theory and practice of energy-efficient computing, undertaking fundamental and experimental research on hardware-software co-design for energy efficiency and hardware reliability. He is the Dean of the Faculty of Engineering and Physical Sciences, University of Southampton, UK, and founder and co-director of the Arm-ECS Research Centre. He was appointed Commander of the Order of the British Empire (CBE) in the 2018 Queen's Birthday Honours for services to computer engineering and to industry, elected Fellow of the Royal Academy of Engineering in 2013, and Fellow of the Institute of Electrical and Electronics Engineers in 2009. He has received a number of international awards, graduated 40 PhD students, and has published 400 technical papers and five research books.Geoff V. Merrett is an Associate Professor at the School of Electronics and Computer Science at the University of Southampton, where he is head of the Centre for Internet of Things and Pervasive Systems. He is internationally known for his research into the system-level energy management of mobile and self-powered embedded systems, and he has published around 170 journal and conference papers in these areas. He was a co-investigator on the £5.6M PRiME Programme Grant on runtime power and reliability management of many-core systems, where he led the applications and cross-layer interaction theme. He was General Chair of the European Workshop on Microelectronics Education in 2016, is an Associate Editor for IET CDT, and is a member of the IET and IEEE.

• Part I: Programming models, OS and applicationsChapter 1: HPC with many core processorsChapter 2: From irregular heterogeneous software to reconfigurable hardwareChapter 3: Operating systems for many-core systemsChapter 4: Decoupling the programming model from resource management in throughput processorsChapter 5: Tools and workloads for many-core computingChapter 6: Hardware and software performance in deep learning Part II: Runtime managementChapter 7: Adaptive-reflective middleware for power and energy management in many-core heterogeneous systemsChapter 8: Advances in power management of many-core processorsChapter 9: Runtime thermal management of many-core systemsChapter 10: Adaptive packet processing on CPU-GPU heterogeneous platformsChapter 11: From power-efficient to power-driven computing Part III: System modelling, verification, and testingChapter 12: Modelling many-core architecturesChapter 13: Power modelling of multicore systemsChapter 14: Developing portable embedded software for multicore systems through formal abstraction and refinementChapter 15: Self-testing of multicore processorsChapter 16: Advances in hardware reliability of reconfigurable many-core embedded systems Part IV: Architectures and systemsChapter 17: Manycore processor architecturesChapter 18: Silicon photonics enabled rack-scale many-core systemsChapter 19: Cognitive I/O for 3D-integrated many-core systemChapter 20: Approximate computing across the hardware and software stacksChapter 21: Many-core systems for big-data computingChapter 22: Biologically-inspired massively-parallel computing