Bashir M, Al-Hashimi – författare

System-on-Chip (SoC) is believed to represent the next major market for microelectronics, and there is a considerable interest world-wide in developing effective methods and tools to support the SoC paradigm. The field of SoC is broad and expanding and at present the technical and technological literature about the overall state-of-the-art in SoC is dispersed across a wide spectrum of books, journals, and conference proceedings. This edited book is an attempt to provide a comprehensive and accessible source of state-of-the-art information on existing and emerging SoC key research areas. In particular, the book covers the general principles and ideas of designing, validating and testing complex embedded computing systems and their underlying tradeoffs. Twenty-five international research groups have contributed to the book. Each contribution has an up-to-date survey highlighting the key achievements and future trends. To facilitate the understanding of the various topics covered in the book, each chapter has some background covering the basic principles, and extensive list of references. To enhance the book readability, the chapters are grouped into eight parts, each part examining a particular theme of SoC, including system design, embedded software, power management, reconfigurable computing, network-on-chip, verification and test. The book will be of interest to graduate students, designers and managers working in Electronic and Computer engineering.

Enables readers to assess, manage and prevent damage from the environment’s biggest enemy: microplastics Microplastics in the Environment addresses the biggest unresolved pollution issue: microplastics accumulating in the environment at a rapidly growing rate, giving rise to severe ecological stress and novel diseases in both aquatic and terrestrial organisms. This book is a one-stop resource that ties together the latest developments in this fast-moving field, including analytical techniques, risk assessment methods and predictive approaches, and evaluates different strategies that make it possible to minimize and redress microplastics pollution in the near and distant future. The book is organized into three main parts. Part one explains the fundamental ideas underlying microplastics, including their classification, major sources, detection and characterisation, as well as risk assessment methods. The second part covers the fate and transport of microplastics in various environmental domains, their interaction with ecosystems and the exposure of humans to environment-borne microplastics. The final part surveys current and future approaches to limit and remove the environmental effects of microplastics, from replacement of plastics with biodegradable substitutes to more efficient recycling of plastics to their active removal and remediation. Microplastics in the Environment includes information on: Microplastics’ interaction with agricultural crops, the food and construction industries and water and solid waste pollution control systemsMicroplastics in microbial communities, crops and soil and the subsequent impacts on microbial metabolism, plant growth and geo-chemical properties of soil, respectivelyConsumption of microplastics by aquatic life and consequent effects of microplastics on the development of aquatic organisms including corals, invertebrates and marine and freshwater biotaGlobal strategies, existing regulations and policies focused on microplastics managementWith its emphasis on management and remediation, Microplastics in the Environment is a valuable resource for environmental scientists, government agencies and researchers working in the field of microplastics pollution.

Methods and solutions to protect the environment against PFAS, in line with new regulations by US and EU authorities PFAS in the Environment comprehensively summarizes the chemical and ecotoxicological properties of different types of per- and polyfluorinated alkanes (PFAS) as well as current and emerging detection methods, known and suspected health risks, and removal technologies from water and soil. This book considers the recently enacted and much stricter regulations set by the US EPA and its European counterpart on the production and use of PFAS. A special focus is placed on how water treatment plants may be upgraded to reduce PFAS content in drinking water. In PFAS in the Environment, readers will find information on: Occurrence, distribution, fate/transport, and behavior of PFASClimate change threats posed by PFASCase studies detailing cutting-edge research and remediation of PFASGlobal regulations of PFASStrategies to phase out PFAS from industrial and consumer products and ultimately achieve a PFAS-free environmentPFAS in the Environment serves as an excellent up-to-date resource on the subject for environmental scientists and professionals as well as government agencies and researchers in environmental and human toxicology.

Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature and current density. This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. The first part of this book surveys the existing techniques for power constrained testing of VLSI circuits. In the second part, several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths are presented.

By shrinking feature sizes, deep-submicron technology is enabling the design of systems with increased complexity on a single chip, but it is also introducing a productivity design gap. Additionally, system designers have to cope with an ever-increasing application complexity and shrinking time-to-market windows. Design re-use and system-level co-synthesis are two approaches that are being employed to bridge the design gap and to aid system designers. Power consumption has become one of the main barriers in embedded computing systems design and therefore, methodologies and techniques that provide power-aware hardware/software co-design are necessary. System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling.The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone. System-Level Design Techniques for Energy-Efficient Embedded Systems will be of interest to advanced undergraduates, graduate students, and designers, whom are interested in energy-efficient embedded systems design.

Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature and current density.Power-Constrained Testing of VLSI Circuits focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. The first part of this book surveys the existing techniques for power constrained testing of VLSI circuits. In the second part, several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths are presented.

System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.