Vijay Nath received his bachelor’s degree in physics and Master's degree in electronics from DDU Gorakhpur University, in 1998 and 2001, respectively. He received PGDCN (GM) from MMMUT Gorakhpur in 1999 and a Ph.D. degree in VLSI Design & Technology from Dr. RML Avadh University Ayodhya in association with CEERI- Pilani in 2008. He is presently an Associate Professor in the Dept. of ECE, BIT Mesra Ranchi. His research interests include micro & nano-electronics, analog & digital VLSI design, ASICs, embedded systems designs, Internet of Things, & machine learning. He has to his credit around 195 publications in reputed journals and conferences and 3 scholars were awarded Ph.D. degrees under his supervision. Jyotsna Kumar Mandal received his M.Sc. in Physics from Jadavpur University in 1986 and M.Tech. in Computer Science from the University of Calcutta and was awarded a Ph.D. in Computer Science and Engineering by Jadavpur University in 2000. Currently, he is a Professor of Computer Science and Engineering and was Dean of the Faculty of Engineering, Technology, and Management at Kalyani University, West Bengal for two consecutive terms. He has 30 years of teaching and research experience. His research interests include coding theory, data, and network security; remote sensing and GIS-based applications, data compression, error correction, visual cryptography, steganography, security in MANET, wireless networks, and unified computing. He has over 30 proceedings volumes, 6 books, 160 journal publications to his credit. He has supervised 23 scholars for their Ph.D. degrees.

• Design, implementation and study of an IoT based battery life cycle tester and SoC indicator.- Design and Integration of Collaborative Features along with an Efficient GUI to the Industrial ROBOT.- Design of a CMOS Filter for basenoise Removal of ECG signal.- Performance study of 81-level inverter using two stage switch ladder circuit.- Design of Error tolerant and Low power Approximate full Adder.- Degradation of optical communication system performance due to SPM.- Real time measurement and analysis of power quality issues in distribution system.

Vijay Nath received his bachelor’s degree in physics and Master's degree in electronics from DDU Gorakhpur University, in 1998 and 2001, respectively. He received PGDCN (GM) from MMMUT Gorakhpur in 1999 and a Ph.D. degree in VLSI Design & Technology from Dr. RML Avadh University Ayodhya in association with CEERI- Pilani in 2008. He is presently an Associate Professor in the Dept. of ECE, BIT Mesra Ranchi. His research interests include micro & nano-electronics, analog & digital VLSI design, ASICs, embedded systems designs, Internet of Things, & machine learning. He has to his credit around 195 publications in reputed journals and conferences and 3 scholars were awarded Ph.D. degrees under his supervision. Jyotsna Kumar Mandal received his M.Sc. in Physics from Jadavpur University in 1986 and M.Tech. in Computer Science from the University of Calcutta and was awarded a Ph.D. in Computer Science and Engineering by Jadavpur University in 2000. Currently, he is a Professor of Computer Science and Engineering and was Dean of the Faculty of Engineering, Technology, and Management at Kalyani University, West Bengal for two consecutive terms. He has 30 years of teaching and research experience. His research interests include coding theory, data, and network security; remote sensing and GIS-based applications, data compression, error correction, visual cryptography, steganography, security in MANET, wireless networks, and unified computing. He has over 30 proceedings volumes, 6 books, 160 journal publications to his credit. He has supervised 23 scholars for their Ph.D. degrees.

• Design, implementation and study of an IoT based battery life cycle tester and SoC indicator.- Design and Integration of Collaborative Features along with an Efficient GUI to the Industrial ROBOT.- Design of a CMOS Filter for basenoise Removal of ECG signal.- Performance study of 81-level inverter using two stage switch ladder circuit.- Design of Error tolerant and Low power Approximate full Adder.- Degradation of optical communication system performance due to SPM.- Real time measurement and analysis of power quality issues in distribution system.

Vijay Nath received his bachelor’s degree in physics and Master's degree in electronics from DDU Gorakhpur University, in 1998 and 2001, respectively. He received PGDCN (GM) from MMMUT Gorakhpur in 1999 and a Ph.D. degree in VLSI Design & Technology from Dr. RML Avadh University Ayodhya in association with CEERI- Pilani in 2008. He is presently an Associate Professor in the Dept. of ECE, BIT Mesra Ranchi. His research interests include micro & nano-electronics, analog & digital VLSI design, ASICs, embedded systems designs, Internet of Things, & machine learning. He has to his credit around 195 publications in reputed journals and conferences and 3 scholars were awarded Ph.D. degrees under his supervision. Jyotsna Kumar Mandal received his M.Sc. in Physics from Jadavpur University in 1986 and M.Tech. in Computer Science from the University of Calcutta and was awarded a Ph.D. in Computer Science and Engineering by Jadavpur University in 2000. Currently, he is a Professor of Computer Science and Engineering and was Dean of the Faculty of Engineering, Technology, and Management at Kalyani University, West Bengal for two consecutive terms. He has 30 years of teaching and research experience. His research interests include coding theory, data, and network security; remote sensing and GIS-based applications, data compression, error correction, visual cryptography, steganography, security in MANET, wireless networks, and unified computing. He has over 30 proceedings volumes, 6 books, 160 journal publications to his credit. He has supervised 23 scholars for their Ph.D. degrees.

• Design, implementation and study of an IoT based battery life cycle tester and SoC indicator.- Design and Integration of Collaborative Features along with an Efficient GUI to the Industrial ROBOT.- Design of a CMOS Filter for basenoise Removal of ECG signal.- Performance study of 81-level inverter using two stage switch ladder circuit.- Design of Error tolerant and Low power Approximate full Adder.- Degradation of optical communication system performance due to SPM.- Real time measurement and analysis of power quality issues in distribution system.