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The first book to deal with the design and optimization of transistors made from strained layers, Applications of Silicon-Germanium Heterostructure Devices combines three distinct topics-technology, device design and simulation, and applications-in a comprehensive way. Important aspects of the book include key technology issues for the growth of strained layers, background theory of the HBT, how device simulation can be used to predict the optimum HBT device structure for a particular application such as cryogenics, compact SiGe-HBT models for RF applications and the SPICE parameter extraction, and strategies for the enhancement of the high-frequency performance of heterojunction field effect transistors (HFETs) using MOSFET or MODFET structures. The book also covers the design and application of optoelectronic devices and assesses how SiGe technology competes with other alternative technologies in the RF wireless communications marketplace.

A combination of the materials science, manufacturing processes, and pioneering research and developments of SiGe and strained-Si have offered an unprecedented high level of performance enhancement at low manufacturing costs. Encompassing all of these areas, Strained-Si Heterostructure Field Effect Devices addresses the research needs associated with the front-end aspects of extending CMOS technology via strain engineering. The book provides the basis to compare existing technologies with the future technological directions of silicon heterostructure CMOS.After an introduction to the material, subsequent chapters focus on microelectronics, engineered substrates, MOSFETs, and hetero-FETs. Each chapter presents recent research findings, industrial devices and circuits, numerous tables and figures, important references, and, where applicable, computer simulations. Topics covered include applications of strained-Si films in SiGe-based CMOS technology, electronic properties of biaxial strained-Si films, and the developments of the gate dielectric formation on strained-Si/SiGe heterolayers. The book also describes silicon hetero-FETs in SiGe and SiGeC material systems, MOSFET performance enhancement, and process-induced stress simulation in MOSFETs.From substrate materials and electronic properties to strained-Si/SiGe process technology and devices, the diversity of R&D activities and results presented in this book will no doubt spark further development in the field.

This book comprehensively covers the areas of materials growth, characterisation and descriptions for the new devices in siliconheterostructure material systems. In recent years, the development of powerful epitaxial growth techniques such as molecular beam epitaxy (MBE), ultra-high vacuum chemical vapour deposition (UHVCVD) and other low temperature epitaxy techniques has given rise to a new area of research of bandgap engineering in silicon-based materials. This has paved the way not only for heterojunction bipolar and field effect transistors, but also for other fascinating novel quantum devices. This book provides an excellent introduction and valuable references for postgraduate students and research scientists.

Technology Computer Aided Design for Si, SiGe and GaAs Integrated Circuits is the first book that deals with a broad spectrum of process and device design, and modelling issues related to various semiconductor devices. This monograph attempts to bridge the gap between device modelling and process design using TCAD. Many simulation examples for different types of Si-, SiGe-, GaAs- and InP-based heterostructure MOS and bipolar transistors are given and compared with experimental data from state-of-the-art devices. Bringing various aspects of silicon heterostructures into one resource, this book also presents a comprehensive perspective of the emerging field and covers topics ranging from materials to fabrication, devices, modelling and applications.The monograph is aimed at research and development engineers and scientists who are actively involved in microelectronics technology and device design via Technology CAD. It will also serve as a reference for postgraduate and research students in the field of electrical engineering and solid-state physics, and for TCAD engineers and developers.

A combination of the materials science, manufacturing processes, and pioneering research and developments of SiGe and strained-Si have offered an unprecedented high level of performance enhancement at low manufacturing costs. Encompassing all of these areas, Strained-Si Heterostructure Field Effect Devices addresses the research needs associated wi

The first book to deal with the design and optimization of transistors made from strained layers, Applications of Silicon-Germanium Heterostructure Devices combines three distinct topics-technology, device design and simulation, and applications-in a comprehensive way. Important aspects of the book include key technology issues for the growth of st

Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Written from an engineering application standpoint, Strain-Engineered MOSFETs introduces promising strain techniques to fabricate strain-engineered MOSFETs and to methods to assess the applications of these techniques. The book provides the background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOSFETs at nanoscale. This book focuses on recent developments in strain-engineered MOSFETS implemented in high-mobility substrates such as, Ge, SiGe, strained-Si, ultrathin germanium-on-insulator platforms, combined with high-k insulators and metal-gate. It covers the materials aspects, principles, and design of advanced devices, fabrication, and applications. It also presents a full technology computer aided design (TCAD) methodology for strain-engineering in Si-CMOS technology involving data flow from process simulation to process variability simulation via device simulation and generation of SPICE process compact models for manufacturing for yield optimization.Microelectronics fabrication is facing serious challenges due to the introduction of new materials in manufacturing and fundamental limitations of nanoscale devices that result in increasing unpredictability in the characteristics of the devices. The down scaling of CMOS technologies has brought about the increased variability of key parameters affecting the performance of integrated circuits. This book provides a single text that combines coverage of the strain-engineered MOSFETS and their modeling using TCAD, making it a tool for process technology development and the design of strain-engineered MOSFETs.

The first book to deal with the design and optimization of transistors made from strained layers, Applications of Silicon-Germanium Heterostructure Devices combines three distinct topics-technology, device design and simulation, and applications-in a comprehensive way. Important aspects of the book include key technology issues for the growth of st

Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Written from an engineering application standpoint, Strain-Engineered MOSFETs introduces promising strain techniques to fabricate strain-engineered MOSFETs and to methods to assess the applications of these techniques. The book provides the background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOSFETs at nanoscale. This book focuses on recent developments in strain-engineered MOSFETS implemented in high-mobility substrates such as, Ge, SiGe, strained-Si, ultrathin germanium-on-insulator platforms, combined with high-k insulators and metal-gate. It covers the materials aspects, principles, and design of advanced devices, fabrication, and applications. It also presents a full technology computer aided design (TCAD) methodology for strain-engineering in Si-CMOS technology involving data flow from process simulation to process variability simulation via device simulation and generation of SPICE process compact models for manufacturing for yield optimization.Microelectronics fabrication is facing serious challenges due to the introduction of new materials in manufacturing and fundamental limitations of nanoscale devices that result in increasing unpredictability in the characteristics of the devices. The down scaling of CMOS technologies has brought about the increased variability of key parameters affecting the performance of integrated circuits. This book provides a single text that combines coverage of the strain-engineered MOSFETS and their modeling using TCAD, making it a tool for process technology development and the design of strain-engineered MOSFETs.