Giorgio, Di Natale – författare

Reliability has always been a major concern in designing computing systems. However, the increasing complexity of such systems has led to a situation where efforts for assuring reliability have become extremely costly, both for the design of solutions for the mitigation of possible faults, and for the reliability assessment of such techniques.Cross-layer reliability is fast becoming the preferred solution. In a cross-layer resilient system, physical and circuit level techniques can mitigate low-level faults. Hardware redundancy can be used to manage errors at the hardware architecture layer. Eventually, software implemented error detection and correction mechanisms can manage those errors that escaped the lower layers of the stack.This book presents state-of-the-art solutions for increasing the resilience of computing systems, both at single levels of abstraction and multi-layers. The book begins by addressing design techniques to improve the resilience of computing systems, covering the logic layer, the architectural layer and the software layer. The second part of the book focuses on cross-layer resilience, including coverage of physical stress, reliability assessment approaches, fault injection at the ISA level, analytical modelling for cross-later resiliency, and stochastic methods.Cross-Layer Reliability of Computing Systems is a valuable resource for researchers, postgraduate students and professional computer architects focusing on the dependability of computing systems.

This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers.

This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers.