Henk Corporaal – författare

Exploring new trends in computer technology, Corporal introduces an innovative and exciting concept: Transport Triggered Architecture (TTAs). Unlike most traditional architectures, where programmed operations trigger internal data transports, TTAs function through programming the data transports themselves. As a result the new architecture alleviates bottlenecks, allows for new code-generation optimizations and exploits hardware more efficiently. Founded on the author’s recent research, this book evaluates the attributes of different classes of architectures. It demonstrates how TTAs can be used as a template for automatic generation of application-specific processors and highlights their suitability for embedded system design. Several commercial TTA implementations have proven its concepts and advantages. Features includes: Complexity analysis of the data path of Instruction Level Parallel processors, particularly of VLIW (Very Long Instruction Word) and super-pipelined processorsDerivation of the transport triggering concept illustrating processor simplificationIn-depth analysis of the architecture design space of TTAs and evaluation of architecture parametersExamination of the control and pipelining of instruction, function and register unitsDescription of a trajectory for the automatic synthesis of TTAs for arbitrary applications written in a high-level languageDetailed description of a prototype TTA processor enabling the reader to design an embedded computer system with excellent cost-performance ratioMicroprocessor Architectures is cutting-edge text which will prove invaluable to both industrial hardware and software engineers involved in embedded system design and to postgraduate electrical engineering and computer science students. This clearly-structured reference demonstrates the versatility of TTAs and explores their influential role in the next generation of computer architecture.

This book describes a new, coarse-grained reconfigurable architecture (CGRA), called Blocks, and puts it in the context of computer architectures, and in particular of other CGRAs.

This book describes a new, coarse-grained reconfigurable architecture (CGRA), called Blocks, and puts it in the context of computer architectures, and in particular of other CGRAs.

Dieses Buch beschreibt eine neue, grobkörnige rekonfigurierbare Architektur (CGRA), genannt Blocks, und stellt sie in den Kontext von Computerarchitekturen und insbesondere von anderen CGRAs.

This book provides a comprehensive overview of the state-of-the-art, data flow-based techniques for the analysis, modeling and mapping technologies of concurrent applications on multi-processors.  The authors present a flow for designing embedded hard/firm real-time multiprocessor streaming applications, based on data flow formalisms, with a particular focus on wireless modem applications. Architectures are described for the design tools and run-time scheduling and resource management of such a platform.

This book provides a comprehensive overview of the state-of-the-art, data flow-based techniques for the analysis, modeling and mapping technologies of concurrent applications on multi-processors.  The authors present a flow for designing embedded hard/firm real-time multiprocessor streaming applications, based on data flow formalisms, with a particular focus on wireless modem applications. Architectures are described for the design tools and run-time scheduling and resource management of such a platform.

Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In Multimedia Multiprocessor Systems, an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such systems, an automated design-flow is needed that can generate systems from a high-level architectural description such that they are not error-prone and consume less time. Such a design methodology is presented for multiple use-cases -- combinations of active applications. A resource manager is also presented to manage the various resources in the system, and to achieve the goals of performance prediction, admission control and budget enforcement.